- 05 8月, 2010 3 次提交
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由 Dongdong Deng 提交于
Use the macros provided by the HW breakpoint API. Signed-off-by: NDongdong Deng <dongdong.deng@windriver.com> Signed-off-by: NJason Wessel <jason.wessel@windriver.com>
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由 Andi Kleen 提交于
Found by gcc 4.6's new warnings Signed-off-by: NAndi Kleen <ak@linux.intel.com> Signed-off-by: NJason Wessel <jason.wessel@windriver.com>
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由 Jason Wessel 提交于
Implement the ability to individually get and set registers for kdb and kgdb for x86. Signed-off-by: NJason Wessel <jason.wessel@windriver.com> Acked-by: NH. Peter Anvin <hpa@zytor.com> CC: Ingo Molnar <mingo@redhat.com> CC: x86@kernel.org
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- 04 8月, 2010 16 次提交
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由 Fenghua Yu 提交于
Power limit notification feature is published in Intel 64 and IA-32 Architectures SDMV Vol 3A 14.5.6 Power Limit Notification. It is implemented first on Intel Sandy Bridge platform. The patch handles notification interrupt. Interrupt handler dumps power limit information in log_buf, logs the event in mce log, and increases the event counters (core_power_limit and package_power_limit). Upper level applications could use the data to detect system health or diagnose functionality/performance issues. In the future, the event could be handled in a more fancy way. Signed-off-by: NFenghua Yu <fenghua.yu@intel.com> LKML-Reference: <1280448826-12004-5-git-send-email-fenghua.yu@intel.com> Reviewed-by: NLen Brown <len.brown@intel.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Fenghua Yu 提交于
Add package level thermal throttle interrupt support. The interrupt handler increases package level thermal throttle count. It also logs the event in MCE log. The package level thermal throttle interrupt happens across threads in a package. Each thread handles the interrupt individually. User level application is supposed to retrieve correct event count and log based on package/thread topology. This is the same situation for core level interrupt handler. In the future, interrupt may be reported only per package or per core. core_throttle_count and package_throttle_count are used for user interface. Previously only throttle_count is used for core throttle count. If you think new core_throttle_count name breaks user interface, I can change this part. Signed-off-by: NFenghua Yu <fenghua.yu@intel.com> LKML-Reference: <1280448826-12004-4-git-send-email-fenghua.yu@intel.com> Reviewed-by: NLen Brown <len.brown@intel.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Dave Jones 提交于
The only machines this is triggering on should be supported by acpi-cpufreq or acpi's internal throttling. Signed-off-by: NDave Jones <davej@redhat.com>
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由 Holger Freyther 提交于
Use __cpuinit instead of __init for the cpufreq_driver init function like it is done in powernow-k8.c. This is removing the warning generated when compiling with the CONFIG_DEBUG_SECTION_MISMATCH=y option. Signed-off-by: NHolger Hans Peter Freyther <holger@moiji-mobile.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Holger Freyther 提交于
Use __cpuinit instead of __init for the cpufreq_driver init function like it is done in powernow-k8.c. Use the __cpuinitdata for data used by the routines marked as __cpuinit. This is removing the warning generated when compiling with the CONFIG_DEBUG_SECTION_MISMATCH=y option. Signed-off-by: NHolger Hans Peter Freyther <holger@moiji-mobile.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Holger Freyther 提交于
Use __cpuinit instead of __init for the cpufreq_driver init function like it is done in powernow-k8.c. This is removing the warning generated when compiling with the CONFIG_DEBUG_SECTION_MISMATCH=y option. Signed-off-by: NHolger Hans Peter Freyther <holger@moiji-mobile.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Borislav Petkov 提交于
rdmsr() takes the lower 32 bits as a second argument and the high 32 as a third. Fix the names accordingly since they were swapped. There should be no functionality change resulting from this patch. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Peter Huewe 提交于
This patch converts pci_table entries, where .subvendor=PCI_ANY_ID and .subdevice=PCI_ANY_ID, .class=0 and .class_mask=0, to use the PCI_VDEVICE macro, and thus improves readability. Signed-off-by: NPeter Huewe <peterhuewe@gmx.de> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Kulikov Vasiliy 提交于
Use for_each_pci_dev() to simplify the code. Signed-off-by: NKulikov Vasiliy <segooon@gmail.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Thomas Renninger 提交于
and fix the broken case if a core's frequency depends on others. trace_power_frequency was only implemented in a rather ungeneric way in acpi-cpufreq driver's target() function only. -> Move the call to trace_power_frequency to cpufreq.c:cpufreq_notify_transition() where CPUFREQ_POSTCHANGE notifier is triggered. This will support power frequency tracing by all cpufreq drivers trace_power_frequency did not trace frequency changes correctly when the userspace governor was used or when CPU cores' frequency depend on each other. -> Moving this into the CPUFREQ_POSTCHANGE notifier and pass the cpu which gets switched automatically fixes this. Robert Schoene provided some important fixes on top of my initial quick shot version which are integrated in this patch: - Forgot some changes in power_end trace (TP_printk/variable names) - Variable dummy in power_end must now be cpu_id - Use static 64 bit variable instead of unsigned int for cpu_id Signed-off-by: NThomas Renninger <trenn@suse.de> CC: davej@redhat.com CC: arjan@infradead.org CC: linux-kernel@vger.kernel.org CC: robert.schoene@tu-dresden.de Tested-by: robert.schoene@tu-dresden.de Signed-off-by: NDave Jones <davej@redhat.com>
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由 Thomas Renninger 提交于
Signed-off-by: NThomas Renninger <trenn@suse.de> CC: venki@google.com CC: davej@redhat.com CC: arjan@infradead.org CC: linux-kernel@vger.kernel.org Signed-off-by: NDave Jones <davej@redhat.com>
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由 Marti Raudsepp 提交于
On Wed, 2010-01-20 at 16:56 +0100, Thomas Renninger wrote: > But most often this happens if people upgrade their CPU and do not > update their BIOS. > Or the vendor does not recognise the new CPU even if the BIOS got > updated. Maybe some of those people just didn't realize it was disabled in BIOS? If you tell users that it's a firmware bug then they'll probably just give up. > The itself message might be an enhancment, IMO it's not worth a patch. Why do you think so? I spent an hour on hunting down the BIOS upgrade, only to find that it didn't improve anything. It was a day later that I realized that it might be a BIOS option; and the option was literally the _last_ option in the whole BIOS setup. :) This message would have saved the day. > But do not revert the FW_BUG part! Sure, you have a point here. How about this patch?
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由 Borislav Petkov 提交于
The Pstate transition latency check was added for broken F10h BIOSen which wrongly contain a value of 0 for transition and bus master latency. Fam11h and later, however, (will) have similar transition latency so extend that behavior for them too. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Matthew Garrett 提交于
The PCC cpufreq driver unmaps the mailbox address range if any CPUs fail to initialise, but doesn't do anything to remove the registered CPUs from the cpufreq core resulting in failures further down the line. We're better off simply returning a failure - the cpufreq core will unregister us cleanly if we end up with no successfully registered CPUs. Tidy up the failure path and also add a sanity check to ensure that the firmware gives us a realistic frequency - the core deals badly with that being set to 0. Signed-off-by: NMatthew Garrett <mjg@redhat.com> Cc: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Daniel J Blueman 提交于
Prevent double freeing on error path. Signed-off-by: NDaniel J Blueman <daniel.blueman@gmail.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Matthew Garrett 提交于
The pcc specification documents an _OSC method that's incompatible with the one defined as part of the ACPI spec. This shouldn't be a problem as both are supposed to be guarded with a UUID. Unfortunately approximately nobody (including HP, who wrote this spec) properly check the UUID on entry to the _OSC call. Right now this could result in surprising behaviour if the pcc driver performs an _OSC call on a machine that doesn't implement the pcc specification. Check whether the PCCH method exists first in order to reduce this probability. Signed-off-by: NMatthew Garrett <mjg@redhat.com> Cc: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Signed-off-by: NDave Jones <davej@redhat.com>
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- 03 8月, 2010 1 次提交
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由 Borislav Petkov 提交于
Notify all parties registered on the mce decoder chain about logged correctable MCEs. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> Acked-by: NDoug Thompson <dougthompson@xmission.com> Acked-by: NIngo Molnar <mingo@elte.hu>
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- 02 8月, 2010 3 次提交
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由 Michal Schmidt 提交于
Accomodate the original C1E-aware idle routine to the different times during boot when the BIOS enables C1E. While at it, remove the synthetic CPUID flag in favor of a single global setting which denotes C1E status on the system. [ hpa: changed c1e_enabled to be a bool; clarified cpu bit 3:21 comment ] Signed-off-by: NMichal Schmidt <mschmidt@redhat.com> LKML-Reference: <20100727165335.GA11630@aftab> Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com> Acked-by: NThomas Gleixner <tglx@linutronix.de>
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由 Brian Gerst 提交于
Use a direct per-cpu reference for the GDT instead of using a scratch register. Signed-off-by: NBrian Gerst <brgerst@gmail.com> LKML-Reference: <1280594903-6341-2-git-send-email-brgerst@gmail.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Brian Gerst 提交于
Use a direct per-cpu reference for the IST instead of using a scratch register. Signed-off-by: NBrian Gerst <brgerst@gmail.com> LKML-Reference: <1280594903-6341-1-git-send-email-brgerst@gmail.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 01 8月, 2010 1 次提交
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由 Sheng Yang 提交于
Also add some constants. Signed-off-by: NSheng Yang <sheng@linux.intel.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 31 7月, 2010 1 次提交
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由 Fenghua Yu 提交于
Add package level thermal and power limit feature support. The two MSRs and features are new starting with Intel's Sandy Bridge processor. Please check Intel 64 and IA-32 Architectures SDMV Vol 3A 14.5.6 Power Limit Notification and 14.6 Package Level Thermal Management. This patch also fixes a bug which defines reverse THERM_INT_LOW_ENABLE bit and THERM_INT_HIGH_ENABLE bit. [ hpa: fixed up against current tip:x86/cpu ] Signed-off-by: NFenghua Yu <fenghua.yu@intel.com> LKML-Reference: <1280448826-12004-2-git-send-email-fenghua.yu@intel.com> Reviewed-by: NLen Brown <len.brown@intel.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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- 30 7月, 2010 1 次提交
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由 Stefano Stabellini 提交于
This patch introduce a CONFIG_XEN_PVHVM compile time option to enable/disable Xen PV on HVM support. Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
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- 29 7月, 2010 6 次提交
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由 Jason Wessel 提交于
HW breakpoints events stopped working correctly with kgdb as a result of commit: 018cbffe (Merge commit 'v2.6.33' into perf/core). The regression occurred because the behavior changed for setting NOTIFY_STOP as the return value to the die notifier if the breakpoint was known to the HW breakpoint API. Because kgdb is using the HW breakpoint API to register HW breakpoints slots, it must also now implement the overflow_handler call back else kgdb does not get to see the events from the die notifier. The kgdb_ll_trap function will be changed to be general purpose code which can allow an easy way to implement the hw_breakpoint API overflow call back. Signed-off-by: NJason Wessel <jason.wessel@windriver.com> Acked-by: NDongdong Deng <dongdong.deng@windriver.com> Acked-by: NFrederic Weisbecker <fweisbec@gmail.com>
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由 H. Peter Anvin 提交于
Move cmpxchg emulation code from arch/x86/kernel/cpu (which is otherwise CPU identification) to arch/x86/lib, where other emulation code lives already. Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com> LKML-Reference: <AANLkTikAmaDPji-TVDarmG1yD=fwbffcsmEU=YEuP+8r@mail.gmail.com>
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由 H. Peter Anvin 提交于
Exprot the AMD errata definitions, since they are needed by kvm_amd.ko if that is built as a module. Doing "make allmodconfig" during testing would have caught this. Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com> Cc: Hans Rosenfeld <hans.rosenfeld@amd.com> LKML-Reference: <1280336972-865982-1-git-send-email-hans.rosenfeld@amd.com>
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由 Hans Rosenfeld 提交于
Use the AMD errata checking framework instead of open-coding the test. Signed-off-by: NHans Rosenfeld <hans.rosenfeld@amd.com> LKML-Reference: <1280336972-865982-3-git-send-email-hans.rosenfeld@amd.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Hans Rosenfeld 提交于
Remove check_c1e_idle() and use the new AMD errata checking framework instead. Signed-off-by: NHans Rosenfeld <hans.rosenfeld@amd.com> LKML-Reference: <1280336972-865982-2-git-send-email-hans.rosenfeld@amd.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Hans Rosenfeld 提交于
Errata are defined using the AMD_LEGACY_ERRATUM() or AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that have an OSVW id assigned, which it takes as first argument. Both take a variable number of family-specific model-stepping ranges created by AMD_MODEL_RANGE(). Iff an erratum has an OSVW id, OSVW is available on the CPU, and the OSVW id is known to the hardware, it is used to determine whether an erratum is present. Otherwise, the model-stepping ranges are matched against the current CPU to find out whether the erratum applies. For certain special errata, the code using this framework might have to conduct further checks to make sure an erratum is really (not) present. Signed-off-by: NHans Rosenfeld <hans.rosenfeld@amd.com> LKML-Reference: <1280336972-865982-1-git-send-email-hans.rosenfeld@amd.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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- 27 7月, 2010 6 次提交
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由 Joerg Roedel 提交于
This patch exports the capability of the AMD IOMMU to force cache coherency of DMA transactions through the IOMMU-API. This is required to disable some nasty hacks in KVM when this capability is not available. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Jeremy Fitzhardinge 提交于
x86_hyper_xen_hvm is only defined when Xen is enabled in the kernel config. Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
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由 Borislav Petkov 提交于
The Pstate transition latency check was added for broken F10h BIOSen which wrongly contain a value of 0 for transition and bus master latency. Fam11h and later, however, (will) have similar transition latency so extend that behavior for them too. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Matthew Garrett 提交于
The PCC cpufreq driver unmaps the mailbox address range if any CPUs fail to initialise, but doesn't do anything to remove the registered CPUs from the cpufreq core resulting in failures further down the line. We're better off simply returning a failure - the cpufreq core will unregister us cleanly if we end up with no successfully registered CPUs. Tidy up the failure path and also add a sanity check to ensure that the firmware gives us a realistic frequency - the core deals badly with that being set to 0. Signed-off-by: NMatthew Garrett <mjg@redhat.com> Cc: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Daniel J Blueman 提交于
Prevent double freeing on error path. Signed-off-by: NDaniel J Blueman <daniel.blueman@gmail.com> Signed-off-by: NDave Jones <davej@redhat.com>
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由 Matthew Garrett 提交于
The pcc specification documents an _OSC method that's incompatible with the one defined as part of the ACPI spec. This shouldn't be a problem as both are supposed to be guarded with a UUID. Unfortunately approximately nobody (including HP, who wrote this spec) properly check the UUID on entry to the _OSC call. Right now this could result in surprising behaviour if the pcc driver performs an _OSC call on a machine that doesn't implement the pcc specification. Check whether the PCCH method exists first in order to reduce this probability. Signed-off-by: NMatthew Garrett <mjg@redhat.com> Cc: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Signed-off-by: NDave Jones <davej@redhat.com>
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- 25 7月, 2010 1 次提交
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由 Rafael J. Wysocki 提交于
Commit 2a6b6976 (ACPI: Store NVS state even when entering suspend to RAM) caused the ACPI suspend code save the NVS area during suspend and restore it during resume unconditionally, although it is known that some systems need to use acpi_sleep=s4_nonvs for hibernation to work. To allow the affected systems to avoid saving and restoring the NVS area during suspend to RAM and resume, introduce kernel command line option acpi_sleep=nonvs and make acpi_sleep=s4_nonvs work as its alias temporarily (add acpi_sleep=s4_nonvs to the feature removal file). Addresses https://bugzilla.kernel.org/show_bug.cgi?id=16396 . Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Reported-and-tested-by: Ntomas m <tmezzadra@gmail.com> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 23 7月, 2010 1 次提交
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由 Stefano Stabellini 提交于
hpet_disable is called unconditionally on machine reboot if hpet support is compiled in the kernel. hpet_disable only checks if the machine is hpet capable but doesn't make sure that hpet has been initialized. [ tglx: Made it a one liner and removed the redundant hpet_address check ] Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: NVenkatesh Pallipadi <venki@google.com> LKML-Reference: <alpine.DEB.2.00.1007211726240.22235@kaball-desktop> Cc: stable@kernel.org Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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