1. 08 1月, 2015 1 次提交
  2. 20 3月, 2014 1 次提交
    • S
      s390, cacheinfo: Fix CPU hotplug callback registration · 6575080e
      Srivatsa S. Bhat 提交于
      Subsystems that want to register CPU hotplug callbacks, as well as perform
      initialization for the CPUs that are already online, often do it as shown
      below:
      
      	get_online_cpus();
      
      	for_each_online_cpu(cpu)
      		init_cpu(cpu);
      
      	register_cpu_notifier(&foobar_cpu_notifier);
      
      	put_online_cpus();
      
      This is wrong, since it is prone to ABBA deadlocks involving the
      cpu_add_remove_lock and the cpu_hotplug.lock (when running concurrently
      with CPU hotplug operations).
      
      Instead, the correct and race-free way of performing the callback
      registration is:
      
      	cpu_notifier_register_begin();
      
      	for_each_online_cpu(cpu)
      		init_cpu(cpu);
      
      	/* Note the use of the double underscored version of the API */
      	__register_cpu_notifier(&foobar_cpu_notifier);
      
      	cpu_notifier_register_done();
      
      Fix the cacheinfo code in s390 by using this latter form of callback
      registration.
      
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Signed-off-by: NSrivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      6575080e
  3. 24 10月, 2013 1 次提交
  4. 15 7月, 2013 1 次提交
    • P
      s390: delete __cpuinit usage from all s390 files · e2741f17
      Paul Gortmaker 提交于
      The __cpuinit type of throwaway sections might have made sense
      some time ago when RAM was more constrained, but now the savings
      do not offset the cost and complications.  For example, the fix in
      commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time")
      is a good example of the nasty type of bugs that can be created
      with improper use of the various __init prefixes.
      
      After a discussion on LKML[1] it was decided that cpuinit should go
      the way of devinit and be phased out.  Once all the users are gone,
      we can then finally remove the macros themselves from linux/init.h.
      
      Note that some harmless section mismatch warnings may result, since
      notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
      are flagged as __cpuinit  -- so if we remove the __cpuinit from
      arch specific callers, we will also get section mismatch warnings.
      As an intermediate step, we intend to turn the linux/init.h cpuinit
      content into no-ops as early as possible, since that will get rid
      of these warnings.  In any case, they are temporary and harmless.
      
      This removes all the arch/s390 uses of the __cpuinit macros from
      all C files.  Currently s390 does not have any __CPUINIT used in
      assembly files.
      
      [1] https://lkml.org/lkml/2013/5/20/589
      
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: linux390@de.ibm.com
      Cc: linux-s390@vger.kernel.org
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      e2741f17
  5. 18 10月, 2012 1 次提交
  6. 26 9月, 2012 2 次提交
    • H
      s390/cache: add cpu cache information to /proc/cpuinfo · 6668022c
      Heiko Carstens 提交于
      Add a line for each cpu cache to /proc/cpuinfo.
      Since we only have information of private cpu caches in sysfs we
      add a line for each cpu cache in /proc/cpuinfo which will also
      contain information about shared caches.
      
      For a z196 machine /proc/cpuinfo now looks like:
      
      vendor_id       : IBM/S390
      bogomips per cpu: 14367.00
      features        : esan3 zarch stfle msa ldisp eimm dfp etf3eh highgprs
      cache0          : level=1 type=Data scope=Private size=64K line_size=256 associativity=4
      cache1          : level=1 type=Instruction scope=Private size=128K line_size=256 associativity=8
      cache2          : level=2 type=Unified scope=Private size=1536K line_size=256 associativity=12
      cache3          : level=3 type=Unified scope=Shared size=24576K line_size=256 associativity=12
      cache4          : level=4 type=Unified scope=Shared size=196608K line_size=256 associativity=24
      processor 0: version = FF,  identification = 000123,  machine = 2817
      processor 1: version = FF,  identification = 100123,  machine = 2817
      processor 2: version = FF,  identification = 200123,  machine = 2817
      processor 3: version = FF,  identification = 200123,  machine = 2817
      Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      6668022c
    • H
      s390/cache: expose cpu cache topology via sysfs · 881730ad
      Heiko Carstens 提交于
      Expose cpu cache topology via sysfs.
      The created sysfs directory structure is compatible to what x86, ia64
      and powerpc have.
      On s390 we expose only information about cpu caches which are private
      to a cpu via sysfs . Caches which are shared between cpus do not have
      a sysfs representation.
      The reason for that is that the file "shared_cpu_map" is mandatory
      and only if running under LPAR it is possible to tell which cpus
      share which cache. Second level hypervisors however do not and cannot
      expose that information to guests.
      In order to have a consistent view we made the choice to always only
      expose information about private cpu caches via sysfs.
      
      Example for a z196 cpu (cpu1 in /sys/devices/cpu):
      
      cpu1/cache/index0/size -- 64K
      cpu1/cache/index0/type -- Data
      cpu1/cache/index0/level -- 1
      cpu1/cache/index0/number_of_sets -- 64
      cpu1/cache/index0/shared_cpu_map -- 00000000,00000002
      cpu1/cache/index0/shared_cpu_list -- 1
      cpu1/cache/index0/coherency_line_size -- 256
      cpu1/cache/index0/ways_of_associativity -- 4
      cpu1/cache/index1/size -- 128K
      cpu1/cache/index1/type -- Instruction
      cpu1/cache/index1/level -- 1
      cpu1/cache/index1/number_of_sets -- 64
      cpu1/cache/index1/shared_cpu_map -- 00000000,00000002
      cpu1/cache/index1/shared_cpu_list -- 1
      cpu1/cache/index1/coherency_line_size -- 256
      cpu1/cache/index1/ways_of_associativity -- 8
      cpu1/cache/index2/size -- 1536K
      cpu1/cache/index2/type -- Unified
      cpu1/cache/index2/level -- 2
      cpu1/cache/index2/number_of_sets -- 512
      cpu1/cache/index2/shared_cpu_map -- 00000000,00000002
      cpu1/cache/index2/shared_cpu_list -- 1
      cpu1/cache/index2/coherency_line_size -- 256
      cpu1/cache/index2/ways_of_associativity -- 12
      Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      881730ad