1. 09 10月, 2008 1 次提交
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    • L
      [ARM] 3540/1: ixp23xx: deal with gap in interrupt bitmasks · ec8510f6
      Lennert Buytenhek 提交于
      Patch from Lennert Buytenhek
      
      On the ixp23xx, the microengine thread interrupt sources are numbered
      56..119, but their mask/status bits are located in bit positions 64..127
      in the various registers in the interrupt controller (bit positions
      56..63 are unused.)
      
      We don't deal with this, so currently, when asked to enable IRQ 64, we
      will enable IRQ 56 instead.
      
      The only interrupts >= 64 are the thread interrupt sources, and there
      are no in-tree users of those yet, so this is fortunately not a big
      problem, but this needs fixing anyway.
      Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      ec8510f6
  14. 29 3月, 2006 1 次提交