1. 22 8月, 2013 3 次提交
    • B
      sfc: Rework IRQ enable/disable · d8291187
      Ben Hutchings 提交于
      There are many problems with the current efx_stop_interrupts() and
      efx_start_interrupts():
      
      1. On Siena, it is unsafe to disable the master IRQ enable bit
      (DRV_INT_EN_KER) while any IRQ sources are enabled.
      
      2. On EF10 there is no master IRQ enable bit, so we cannot expect to
      defer IRQs without tearing down event queues.  (Though I don't think
      we will need to keep any event queues around while the device is down,
      as we do for VFDI on Siena.)
      
      3. synchronize_irq() only waits for a running IRQ handler to finish,
      not for any propagation through IRQ controllers.  Therefore an IRQ may
      still be received and handled after efx_stop_interrupts() returns.
      IRQ handlers can then race with channel reallocation.
      
      To fix this:
      
      a. Introduce a software IRQ enable flag.  So long as this is clear,
      IRQ handlers will only acknowledge IRQs and not touch the channel
      structures.
      
      b. Define a new struct efx_msi_context as the context for MSIs.  This
      is never reallocated and is sufficient to find the software enable
      flag and the channel structure.  It also includes the channel/IRQ
      name, which was previously separated out as it must also not be
      reallocated.
      
      c. Split efx_{start,stop}_interrupts() into
      efx_{,soft_}_{enable,disable}_interrupts().  The 'soft' functions
      don't touch the hardware master enable flag (if it exists) and don't
      reinitialise or tear down channels with the keep_eventq flag set.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      d8291187
    • B
      sfc: Rename Falcon-architecture register definitions · 8b8a95a1
      Ben Hutchings 提交于
      The EF10 architecture has a very different register layout from
      previous controllers, so we'll use separate files for the two sets of
      register definitions.  Use 'farch' as an abbreviation for
      Falcon-architecture.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      8b8a95a1
    • B
      sfc: Add GFP flags to efx_nic_alloc_buffer() and make most callers allow blocking · 0d19a540
      Ben Hutchings 提交于
      Most call sites for efx_nic_alloc_buffer() are part of the probe or
      reconfiguration paths and can allocate with GFP_KERNEL.  A few others
      should use GFP_NOIO (I think).  Only one is in atomic context and
      must use the current GFP_ATOMIC.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      0d19a540
  2. 21 8月, 2013 2 次提交
  3. 02 4月, 2013 1 次提交
  4. 08 3月, 2013 1 次提交
    • B
      sfc: Enable RX DMA scattering where possible · 85740cdf
      Ben Hutchings 提交于
      Enable RX DMA scattering iff an RX buffer large enough for the current
      MTU will not fit into a single page and the NIC supports DMA
      scattering for kernel-mode RX queues.
      
      On Falcon and Siena, the RX_USR_BUF_SIZE field is used as the DMA
      limit for both all RX queues with scatter enabled.  Set it to 1824,
      matching what Onload uses now.
      
      Maintain a statistic for frames truncated due to lack of descriptors
      (rx_nodesc_trunc).  This is distinct from rx_frm_trunc which may be
      incremented when scattering is disabled and implies an over-length
      frame.
      
      Whenever an MTU change causes scattering to be turned on or off,
      update filters that point to the PF queues, but leave others
      unchanged, as VF drivers assume scattering is off.
      
      Add n_frags parameters to various functions, and make them iterate:
      - efx_rx_packet()
      - efx_recycle_rx_buffers()
      - efx_rx_mk_skb()
      - efx_rx_deliver()
      
      Make efx_handle_rx_event() responsible for updating
      efx_rx_queue::removed_count.
      
      Change the RX pipeline state to a starting ring index and number of
      fragments, and make __efx_rx_packet() responsible for clearing it.
      
      Based on earlier versions by David Riddoch and Jon Cooper.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      85740cdf
  5. 01 12月, 2012 1 次提交
    • B
      sfc: Really disable flow control while flushing · d5e8cc6c
      Ben Hutchings 提交于
      Receiving pause frames can block TX queue flushes.  Earlier changes
      work around this by reconfiguring the MAC during flushes for VFs, but
      during flushes for the PF we would only change the fc_disable counter.
      Unless the MAC is reconfigured for some other reason during the flush
      (which I would not expect to happen) this had no effect at all.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      d5e8cc6c
  6. 17 7月, 2012 1 次提交
    • B
      sfc: Disable VF queues during register self-test · d4f2cecc
      Ben Hutchings 提交于
      Currently VF queues and drivers may remain active during this test.
      This could cause memory corruption or spurious test failures.
      Therefore we reset the port/function before running these tests on
      Siena.
      
      On Falcon this doesn't work: we have to do some additional
      initialisation before some blocks will work again.  So refactor the
      reset/register-test sequence into an efx_nic_type method so
      efx_selftest() doesn't have to consider such quirks.
      
      In the process, fix another minor bug: Siena does not have an
      'invisible' reset and the self-test currently fails to push the PHY
      configuration after resetting.  Passing RESET_TYPE_ALL to
      efx_reset_{down,up}() fixes this.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      d4f2cecc
  7. 16 2月, 2012 1 次提交
  8. 27 1月, 2012 5 次提交
    • B
      sfc: Clean up test interrupt handling · 1646a6f3
      Ben Hutchings 提交于
      Interrupts are normally generated by the event queues, moderated by
      timers.  However, they may also be triggered by detection of a 'fatal'
      error condition (e.g. memory parity error) or by the host writing to
      certain CSR fields as part of a self-test.
      
      The IRQ level/index used for these on Falcon rev B0 and Siena is set
      by the KER_INT_LEVE_SEL field and cached by the driver in
      efx_nic::fatal_irq_level.  Since this value is also relevant to
      self-tests rename the field to just 'irq_level'.
      
      Avoid unnecessary cache traffic by using a per-channel 'last_irq_cpu'
      field and only writing to the per-controller field when the interrupt
      matches efx_nic::irq_level.  Remove the volatile qualifier and use
      ACCESS_ONCE in the places we read these fields.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      1646a6f3
    • B
      Partly revert "sfc: Handle serious errors in exactly one interrupt handler" · f70d1847
      Ben Hutchings 提交于
      This reverts commit 63695459 in
      drivers/net/ethernet/sfc/falcon.c.
      
      Unlike the INT_ISR0 register on later controller revisions, the
      NET_IVEC_INT_Q bits written to memory are only ever set for
      interrupting event queues, not for any other interrupt sources.
      
      By definition there can only be one legacy interrupt handler per
      function, so there is no need to worry about detecting a fatal
      interrupt more than once.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      f70d1847
    • B
      sfc: Correct interrupt timer quantum for Siena (normal and turbo mode) · cc180b69
      Ben Hutchings 提交于
      We currently assume that the timer quantum for Siena is 5 us, the same
      as for Falcon.  This is not correct; timer ticks are generated on a
      rota which takes a minimum of 768 cycles (each event delivery or other
      timer change will delay it by 3 cycles).  The timer quantum should be
      6.144 or 3.072 us depending on whether turbo mode is active.
      
      Replace EFX_IRQ_MOD_RESOLUTION with a timer_quantum_ns field in struct
      efx_nic, initialised by the efx_nic_type::probe function.
      
      While we're at it, replace EFX_IRQ_MOD_MAX with a timer_period_max
      field in struct efx_nic_type.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      cc180b69
    • B
      sfc: Remove efx_nic_type::push_multicast_hash operation · 30b81cda
      Ben Hutchings 提交于
      Both implementations of efx_nic_type::reconfigure_mac operation
      push the multicast hash filter to the hardware.  It is therefore
      redundant to call efx_nic_type::push_multicast_hash as well.
      
      efx_mcdi_mac_reconfigure() also uses this operation, but the
      implementation for Siena just uses MCDI anyway.  Merge that into
      efx_mcdi_mac_reconfigure().
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      30b81cda
    • B
      sfc: Merge efx_mac_operations into efx_nic_type · 710b208d
      Ben Hutchings 提交于
      No NICs need to switch efx_mac_operations at run-time, and the MAC
      operations are fairly closely bound to NIC types.
      
      Move efx_mac_operations::reconfigure to efx_nic_type::reconfigure_mac
      and efx_mac_operations::check_fault fo efx_nic_type::check_mac_fault.
      Change callers to call through efx->type or directly if the NIC type
      is known.
      
      Remove efx_mac_operations::update_stats.  The implementations for
      Falcon used to fetch MAC statistics synchronously and this was used by
      efx_register_netdev() to clear statistics after running self-tests.
      However, it now only converts statistics that have already been
      fetched (and that only for Falcon), and the call from
      efx_register_netdev() has no effect.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      710b208d
  9. 10 1月, 2012 1 次提交
  10. 20 12月, 2011 1 次提交
  11. 17 9月, 2011 1 次提交
  12. 11 8月, 2011 1 次提交
  13. 25 6月, 2011 2 次提交
    • B
      sfc: Fix mapping of reset reasons and flags to methods · 0e2a9c7c
      Ben Hutchings 提交于
      There are certain hardware bugs that may occur on Falcon during normal
      operation, that require a reset to recover from.  We try to minimise
      disruption by keeping the PHY running, following a reset sequence
      labelled as 'invisible'.
      
      Siena does not suffer from these hardware bugs, so we have not
      implemented an 'invisible' reset sequence.  However, if a similar
      error does occur (due to a hardware fault or software bug) then the
      code shared with Falcon will wrongly assume that the PHY is not being
      reset.
      
      Since the mapping of reset reasons (internal) and flags (ethtool) to
      methods must differ significantly between NIC types, move it into
      per-NIC-type functions (replacing the insufficient reset_world_flags
      field).
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      0e2a9c7c
    • B
      sfc: Allow resets to be upgraded; use atomic ops for safety · a7d529ae
      Ben Hutchings 提交于
      Currently an attempt to schedule any reset is ignored if a reset
      is already pending.  This ignores the relative scopes - if the
      requested reset is greater in scope then the scheduled reset should
      be upgraded accordingly.
      
      There are also some race conditions which could lead to a reset
      request being lost.  Deal with them by using atomic operations on a
      bitmask.  This also makes tests on reset_pending easier to get right.
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      a7d529ae
  14. 15 4月, 2011 1 次提交
  15. 31 3月, 2011 1 次提交
  16. 01 3月, 2011 2 次提交
  17. 24 12月, 2010 1 次提交
  18. 04 12月, 2010 7 次提交
  19. 23 9月, 2010 2 次提交
  20. 22 9月, 2010 1 次提交
  21. 11 9月, 2010 1 次提交
  22. 26 6月, 2010 1 次提交
  23. 25 6月, 2010 2 次提交