1. 11 1月, 2009 1 次提交
  2. 29 12月, 2008 1 次提交
    • I
      sparseirq: work around __weak alias bug · b2e2fe99
      Ingo Molnar 提交于
      Impact: fix boot crash if the kernel is built with certain GCC versions
      
      GCC has a bug with __weak alias functions: if the functions are in
      the same compilation unit as their call site, GCC can decide to
      inline them - and thus rob the linker of the opportunity to override
      the weak alias with the real thing.
      
      This can lead to the boot crash reported by Kamalesh Babulal:
      
       ACPI: Core revision 20080926
       Setting APIC routing to flat
       BUG: unable to handle kernel NULL pointer dereference at
       0000000000000000
       IP: [<ffffffff8021f9a8>] add_pin_to_irq_cpu+0x14/0x74
       PGD 0
       Oops: 0000 [#1] SMP
       [...]
      
      So move the arch_init_chip_data() function from handle.c to manage.c.
      Reported-by: NKamalesh Babulal <kamalesh@linux.vnet.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b2e2fe99
  3. 28 12月, 2008 2 次提交
  4. 27 12月, 2008 2 次提交
  5. 26 12月, 2008 4 次提交
  6. 18 12月, 2008 1 次提交
    • K
      locking, irq: enclose irq_desc_lock_class in CONFIG_LOCKDEP · 74c8a613
      KOSAKI Motohiro 提交于
      Impact: simplify code
      
      commit "08678b08: generic: sparse irqs: use irq_desc() [...]" introduced
      the irq_desc_lock_class variable.
      
      But it is used only if CONFIG_SPARSE_IRQ=Y or CONFIG_TRACE_IRQFLAGS=Y.
      Otherwise, following warnings happen:
      
      	CC      kernel/irq/handle.o
      	kernel/irq/handle.c:26: warning: 'irq_desc_lock_class' defined but not used
      
      Actually, current early_init_irq_lock_class has a bit strange and messy ifdef.
      In addition, it is not valueable.
      
      1. this function is protected by !CONFIG_SPARSE_IRQ, but that is not necessary.
         if CONFIG_SPARSE_IRQ=Y, desc of all irq number are initialized by NULL
         at first - then this function calling is safe.
      
      2. this function protected by CONFIG_TRACE_IRQFLAGS too. but it is not
         necessary either, because lockdep_set_class() doesn't have bad side
         effect even if CONFIG_TRACE_IRQFLAGS=n.
      
      This patch bloat kernel size a bit on CONFIG_TRACE_IRQFLAGS=n and
      CONFIG_SPARSE_IRQ=Y - but that's ok. early_init_irq_lock_class() is not
      a fastpatch at all.
      
      To avoid messy ifdefs is more important than a few bytes diet.
      Signed-off-by: NKOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      74c8a613
  7. 17 12月, 2008 1 次提交
    • Y
      x86, sparseirq: move irq_desc according to smp_affinity, v7 · 48a1b10a
      Yinghai Lu 提交于
      Impact: improve NUMA handling by migrating irq_desc on smp_affinity changes
      
      if CONFIG_NUMA_MIGRATE_IRQ_DESC is set:
      
      -  make irq_desc to go with affinity aka irq_desc moving etc
      -  call move_irq_desc in irq_complete_move()
      -  legacy irq_desc is not moved, because they are allocated via static array
      
      for logical apic mode, need to add move_desc_in_progress_in_same_domain,
      otherwise it will not be moved ==> also could need two phases to get
      irq_desc moved.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      48a1b10a
  8. 08 12月, 2008 2 次提交
    • Y
      x86: use NR_IRQS_LEGACY · 99d093d1
      Yinghai Lu 提交于
      Impact: cleanup
      
      Introduce NR_IRQS_LEGACY instead of hard coded number.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      99d093d1
    • Y
      sparse irq_desc[] array: core kernel and x86 changes · 0b8f1efa
      Yinghai Lu 提交于
      Impact: new feature
      
      Problem on distro kernels: irq_desc[NR_IRQS] takes megabytes of RAM with
      NR_CPUS set to large values. The goal is to be able to scale up to much
      larger NR_IRQS value without impacting the (important) common case.
      
      To solve this, we generalize irq_desc[NR_IRQS] to an (optional) array of
      irq_desc pointers.
      
      When CONFIG_SPARSE_IRQ=y is used, we use kzalloc_node to get irq_desc,
      this also makes the IRQ descriptors NUMA-local (to the site that calls
      request_irq()).
      
      This gets rid of the irq_cfg[] static array on x86 as well: irq_cfg now
      uses desc->chip_data for x86 to store irq_cfg.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0b8f1efa
  9. 16 10月, 2008 20 次提交
  10. 22 7月, 2008 1 次提交
  11. 09 2月, 2008 1 次提交
  12. 15 11月, 2007 1 次提交
    • R
      __do_IRQ does not check IRQ_DISABLED when IRQ_PER_CPU is set · c642b839
      Russ Anderson 提交于
      In __do_IRQ(), the normal case is that IRQ_DISABLED is checked and if set
      the handler (handle_IRQ_event()) is not called.
      
      Earlier in __do_IRQ(), if IRQ_PER_CPU is set the code does not check
      IRQ_DISABLED and calls the handler even though IRQ_DISABLED is set.  This
      behavior seems unintentional.
      
      One user encountering this behavior is the CPE handler (in
      arch/ia64/kernel/mca.c).  When the CPE handler encounters too many CPEs
      (such as a solid single bit error), it sets up a polling timer and disables
      the CPE interrupt (to avoid excessive overhead logging the stream of single
      bit errors).  disable_irq_nosync() is called which sets IRQ_DISABLED.  The
      IRQ_PER_CPU flag was previously set (in ia64_mca_late_init()).  The net
      result is the CPE handler gets called even though it is marked disabled.
      
      If the behavior of not checking IRQ_DISABLED when IRQ_PER_CPU is set is
      intentional, it would be worthy of a comment describing the intended
      behavior.  disable_irq_nosync() does call chip->disable() to provide a
      chipset specifiec interface for disabling the interrupt, which avoids this
      issue when used.
      Signed-off-by: NRuss Anderson <rja@sgi.com>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      c642b839
  13. 10 5月, 2007 1 次提交
  14. 09 5月, 2007 2 次提交
    • B
      Add IRQF_IRQPOLL flag (common code) · d85a60d8
      Bernhard Walle 提交于
      irqpoll is broken on some architectures that don't use the IRQ 0 for the timer
      interrupt like IA64.  This patch adds a IRQF_IRQPOLL flag.
      
      Each architecture is handled in a separate pach.  As I left the irq == 0 as
      condition, this should not break existing architectures that use timer_irq ==
      0 and that I did't address with that patch (because I don't know).
      
      This patch:
      
      This patch adds a IRQF_IRQPOLL flag that the interrupt registration code could
      use for the interrupt it wants to use for IRQ polling.
      
      Because this must not be the timer interrupt, an additional flag was added
      instead of re-using the IRQF_TIMER constant.  Until all architectures will
      have an IRQF_IRQPOLL interrupt, irq == 0 will stay as alternative as it should
      not break anything.
      
      Also, note_interrupt() is called on CPU-specific interrupts to be used as
      interrupt source for IRQ polling.
      Signed-off-by: NBernhard Walle <bwalle@suse.de>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Kyle McMartin <kyle@mcmartin.ca>
      Cc: Matthew Wilcox <willy@debian.org>
      Cc: Grant Grundler <grundler@google.com>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      d85a60d8
    • R
      Pad irq_desc to internode cacheline size · e729aa16
      Ravikiran G Thirumalai 提交于
      We noticed a drop in n/w performance due to the irq_desc being cacheline
      aligned rather than internode aligned.  We see 50% of expected performance
      when two e1000 nics local to two different nodes have consecutive irq
      descriptors allocated, due to false sharing.
      
      Note that this patch does away with cacheline padding for the UP case, as
      it does not seem useful for UP configurations.
      Signed-off-by: NRavikiran Thirumalai <kiran@scalex86.org>
      Signed-off-by: NShai Fultheim <shai@scalex86.org>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      e729aa16