1. 19 7月, 2012 2 次提交
  2. 07 7月, 2012 1 次提交
  3. 17 5月, 2012 2 次提交
  4. 29 3月, 2012 2 次提交
    • R
      remove references to cpu_*_map in arch/ · 0b5f9c00
      Rusty Russell 提交于
      This has been obsolescent for a while; time for the final push.
      
      In adjacent context, replaced old cpus_* with cpumask_*.
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      Acked-by: David S. Miller <davem@davemloft.net> (arch/sparc)
      Acked-by: Chris Metcalf <cmetcalf@tilera.com> (arch/tile)
      Cc: user-mode-linux-devel@lists.sourceforge.net
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Richard Kuo <rkuo@codeaurora.org>
      Cc: linux-hexagon@vger.kernel.org
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: Kyle McMartin <kyle@mcmartin.ca>
      Cc: Helge Deller <deller@gmx.de>
      Cc: sparclinux@vger.kernel.org
      0b5f9c00
    • D
      Disintegrate asm/system.h for MIPS · b81947c6
      David Howells 提交于
      Disintegrate asm/system.h for MIPS.
      Signed-off-by: NDavid Howells <dhowells@redhat.com>
      Acked-by: NRalf Baechle <ralf@linux-mips.org>
      cc: linux-mips@linux-mips.org
      b81947c6
  5. 28 3月, 2012 1 次提交
  6. 20 3月, 2012 2 次提交
  7. 21 2月, 2012 1 次提交
  8. 11 1月, 2012 2 次提交
  9. 08 12月, 2011 6 次提交
  10. 25 10月, 2011 1 次提交
  11. 20 10月, 2011 1 次提交
  12. 21 9月, 2011 2 次提交
  13. 17 9月, 2011 1 次提交
  14. 26 7月, 2011 6 次提交
    • D
      MIPS: Close races in TLB modify handlers. · bf28607f
      David Daney 提交于
      Page table entries are made invalid by writing a zero into the the PTE
      slot in a page table.  This creates a race condition with the TLB
      modify handlers when they are updating the PTE.
      
      CPU0                              CPU1
      
      Test for _PAGE_PRESENT
      .                                 set to not _PAGE_PRESENT (zero)
      Set to _PAGE_VALID
      
      So now the page not present value (zero) is suddenly valid and user
      space programs have access to physical page zero.
      
      We close the race by putting the test for _PAGE_PRESENT and setting of
      _PAGE_VALID into an atomic LL/SC section.  This requires more registers
      than just K0 and K1 in the handlers, so we need to save some registers
      to a save area and then restore them when we are done.
      
      The save area is an array of cacheline aligned structures that should
      not suffer cache line bouncing as they are CPU private.
      
      [ralf@linux-mips.org: Fix !defined(CONFIG_MIPS_PGD_C0_CONTEXT) build error.]
      Signed-off-by: NDavid Daney <david.daney@cavium.com>
      To: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/2577/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      bf28607f
    • K
      MIPS: Limit fixrange_init() to the FIXMAP region · 464fd83e
      Kevin Cernekee 提交于
      fixrange_init() allocates page tables for all addresses higher than
      FIXADDR_TOP.  On processors that override the default FIXADDR_TOP
      address of 0xfffe_0000, this can consume up to 4 pages (1 page per 4MB)
      for pgd's that are never used.
      Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/1980/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      464fd83e
    • K
      MIPS: Add SYNC after cacheflush · d0023c4a
      Kevin Cernekee 提交于
      On processors with deep write buffers, it is likely that many cycles
      will pass between a CACHE instruction and the time the data actually
      gets written out to DRAM.  Add a SYNC instruction to ensure that the
      buffers get emptied before the flush functions return.
      
      Actual problem seen in the wild:
      
      1) dma_alloc_coherent() allocates cached memory
      
      2) memset() is called to clear the new pages
      
      3) dma_cache_wback_inv() is called to flush the zero data out to memory
      
      4) dma_alloc_coherent() returns an uncached (kseg1) pointer to the
      freshly allocated pages
      
      5) Caller writes data through the kseg1 pointer
      
      6) Buffered writeback data finally gets flushed out to DRAM
      
      7) Part of caller's data is inexplicably zeroed out
      
      This patch adds SYNC between steps 3 and 4, which fixed the problem.
      Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: 
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      d0023c4a
    • K
      MIPS: pfn_valid() is broken on low memory HIGHMEM systems · b6da0ffb
      Kevin Cernekee 提交于
      pfn_valid() compares the PFN to max_mapnr:
      
              __pfn >= min_low_pfn && __pfn < max_mapnr;
      
      On HIGHMEM kernels, highend_pfn is used to set the value of max_mapnr.
      Unfortunately, highend_pfn is left at zero if the system does not
      actually have enough RAM to reach into the HIGHMEM range.  This causes
      pfn_valid() to always return false, and when debug checks are enabled
      the kernel will fail catastrophically:
      
      Memory: 22432k/32768k available (2249k kernel code, 10336k reserved, 653k data, 1352k init, 0k highmem)
      NR_IRQS:128
      kfree_debugcheck: out of range ptr 81c02900h.
      Kernel bug detected[#1]:
      Cpu 0
      $ 0   : 00000000 10008400 00000034 00000000
      $ 4   : 8003e160 802a0000 8003e160 00000000
      $ 8   : 00000000 0000003e 00000747 00000747
      ...
      
      On such a configuration, max_low_pfn should be used to set max_mapnr.
      
      This was seen on 2.6.34.
      Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
      To: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/1992/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b6da0ffb
    • D
      MIPS: HIGHMEM DMA on noncoherent MIPS32 processors · e36863a5
      Dezhong Diao 提交于
      [v4: Patch applies to linux-queue.git with kmap_atomic patches:
       https://patchwork.kernel.org/patch/189932/
       https://patchwork.kernel.org/patch/194552/
       https://patchwork.kernel.org/patch/189912/ ]
      
      The MIPS DMA coherency functions do not work properly (i.e. kernel oops)
      when HIGHMEM pages are passed in as arguments.  Use kmap_atomic() to
      temporarily map high pages for cache maintenance operations.
      
      Tested on a 2.6.36-rc7 1GB HIGHMEM SMP no-alias system.
      Signed-off-by: NDezhong Diao <dediao@cisco.com>
      Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
      Cc: Dezhong Diao <dediao@cisco.com>
      Cc: David Daney <ddaney@caviumnetworks.com>
      Cc: David VomLehn <dvomlehn@cisco.com>
      Cc: Sergei Shtylyov <sshtylyov@mvista.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/1695/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e36863a5
    • J
      MIPS: topdown mmap support · d0be89f6
      Jian Peng 提交于
      This patch introduced topdown mmap support in user process address
      space allocation policy.
      
      Recently, we ran some large applications that use mmap heavily and
      lead to OOM due to inflexible mmap allocation policy on MIPS32.
      
      Since most other major archs supported it for years, it is reasonable
      to follow the trend and reduce the pain of porting applications.
      
      Due to cache aliasing concern, arch_get_unmapped_area_topdown() and
      other helper functions are implemented in arch/mips/kernel/syscall.c.
      Signed-off-by: NJian Peng <jipeng2005@gmail.com>
      Cc: David Daney <ddaney@caviumnetworks.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/2389/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      d0be89f6
  15. 01 7月, 2011 1 次提交
    • P
      perf: Remove the nmi parameter from the swevent and overflow interface · a8b0ca17
      Peter Zijlstra 提交于
      The nmi parameter indicated if we could do wakeups from the current
      context, if not, we would set some state and self-IPI and let the
      resulting interrupt do the wakeup.
      
      For the various event classes:
      
        - hardware: nmi=0; PMI is in fact an NMI or we run irq_work_run from
          the PMI-tail (ARM etc.)
        - tracepoint: nmi=0; since tracepoint could be from NMI context.
        - software: nmi=[0,1]; some, like the schedule thing cannot
          perform wakeups, and hence need 0.
      
      As one can see, there is very little nmi=1 usage, and the down-side of
      not using it is that on some platforms some software events can have a
      jiffy delay in wakeup (when arch_irq_work_raise isn't implemented).
      
      The up-side however is that we can remove the nmi parameter and save a
      bunch of conditionals in fast paths.
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Michael Cree <mcree@orcon.net.nz>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
      Cc: Anton Blanchard <anton@samba.org>
      Cc: Eric B Munson <emunson@mgebm.net>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Jason Wessel <jason.wessel@windriver.com>
      Cc: Don Zickus <dzickus@redhat.com>
      Link: http://lkml.kernel.org/n/tip-agjev8eu666tvknpb3iaj0fg@git.kernel.orgSigned-off-by: NIngo Molnar <mingo@elte.hu>
      a8b0ca17
  16. 25 5月, 2011 1 次提交
  17. 19 5月, 2011 3 次提交
  18. 11 5月, 2011 2 次提交
    • R
      MIPS: tlbex: Fix GCC 4.6.0 build error · 4a9040f4
      Ralf Baechle 提交于
        CC      arch/mips/mm/tlbex.o
      arch/mips/mm/tlbex.c: In function 'build_r4000_tlb_refill_handler':
      arch/mips/mm/tlbex.c:1155:22: error: variable 'vmalloc_mode' set but not used [-Werror=unused-but-set-variable]
      arch/mips/mm/tlbex.c:1154:28: error: variable 'htlb_info' set but not used [-Werror=unused-but-set-variable]
      cc1: all warnings being treated as errors
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      4a9040f4
    • R
      MIPS: c-r4k: Fix GCC 4.6.0 build error · 71271aab
      Ralf Baechle 提交于
        CC      arch/mips/mm/c-r4k.o
      arch/mips/mm/c-r4k.c: In function 'probe_scache':
      arch/mips/mm/c-r4k.c:1078:6: error: variable 'tmp' set but not used [-Werror=unused-but-set-variable]
      cc1: all warnings being treated as errors
      
      Older GCC versions didn't warn about the unused variable tmp because it was
      getting initialized.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      71271aab
  19. 06 4月, 2011 1 次提交
  20. 31 3月, 2011 1 次提交
  21. 15 3月, 2011 1 次提交