1. 10 2月, 2009 1 次提交
  2. 09 2月, 2009 1 次提交
  3. 06 2月, 2009 1 次提交
  4. 31 1月, 2009 1 次提交
  5. 29 1月, 2009 2 次提交
    • I
      x86: replace CONFIG_X86_SMP with CONFIG_SMP · 3e5095d1
      Ingo Molnar 提交于
      The x86/Voyager subarch used to have this distinction between
       'x86 SMP support' and 'Voyager SMP support':
      
       config X86_SMP
      	bool
      	depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64)
      
      This is a pointless distinction - Voyager can (and already does) use
      smp_ops to implement various SMP quirks it has - and it can be extended
      more to cover all the specialities of Voyager.
      
      So remove this complication in the Kconfig space.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      3e5095d1
    • I
      x86, apic: untangle the send_IPI_*() jungle · dac5f412
      Ingo Molnar 提交于
      Our send_IPI_*() methods and definitions are a twisted mess: the same
      symbol is defined to different things depending on .config details,
      in a non-transparent way.
      
       - spread out the quirks into separately named per apic driver methods
      
       - prefix the standard PC methods with default_
      
       - get rid of wrapper macro obfuscation
      
       - clean up various details
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      dac5f412
  6. 12 11月, 2008 2 次提交
    • H
      x86: 64 bits: shrink and align IRQ stubs · 939b7871
      H. Peter Anvin 提交于
      Move the IRQ stub generation to assembly to simplify it and for
      consistency with 32 bits.  Doing it in a C file with asm() statements
      doesn't help clarity, and it prevents some optimizations.
      
      Shrink the IRQ stubs down to just over four bytes per (we fit seven
      into a 32-byte chunk.)  This shrinks the total icache consumption of
      the IRQ stubs down to an even kilobyte, if all of them are in active
      use.
      
      The downside is that we end up with a double jump, which could have a
      negative effect on some pipelines.  The double jump is always inside
      the same cacheline on any modern chips.
      
      To get the most effect, cache-align the IRQ stubs.
      
      This makes the 64-bit code match changes already done to the 32-bit
      code, and should open up irqinit*.c for unification.
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      939b7871
    • H
      x86: 32 bit: interrupt stub consistency with 64 bit · 4687518c
      H. Peter Anvin 提交于
      Don't generate interrupt stubs for interrupt vectors below
      FIRST_EXTERNAL_VECTOR, and make the table of interrupt vectors
      (interrupt[]) __initconst.  Both of these changes both conserve memory
      and improve consistency with 64 bits.
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      4687518c
  7. 23 10月, 2008 2 次提交
  8. 16 10月, 2008 3 次提交
  9. 11 8月, 2008 1 次提交
  10. 25 7月, 2008 2 次提交
  11. 24 7月, 2008 1 次提交
    • M
      x86: PIC, L-APIC and I/O APIC debug information · 32f71aff
      Maciej W. Rozycki 提交于
       Dump all the PIC, local APIC and I/O APIC information at the
      fs_initcall() level, which is after ACPI (if used) has initialised PCI
      information, making the point of invocation consistent across MP-table and
      ACPI platforms.  Remove explicit calls to print_IO_APIC() from elsewhere.
      Make the interface of all the functions involved consistent between 32-bit
      and 64-bit versions and make them all static by default by the means of a
      New-and-Improved(TM) __apicdebuginit() macro.
      
       Note that like print_IO_APIC() all these only output anything if
      "apic=debug" has been passed to the kernel through the command line.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Cc: Chuck Ebbert <cebbert@redhat.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      32f71aff
  12. 23 7月, 2008 2 次提交
  13. 12 7月, 2008 1 次提交
  14. 08 7月, 2008 1 次提交
  15. 13 5月, 2008 5 次提交
  16. 11 10月, 2007 1 次提交