- 19 12月, 2011 1 次提交
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由 Linus Walleij 提交于
This adds a few CPU identification functions for the U5500 variants. Contains portions of code written by Rabin Vincent. Cc: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 5月, 2011 1 次提交
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由 Linus Walleij 提交于
This is redundant. The correct ID number is right there in the hardware anyway. We will introduce a mechanism later to hard-code this for deviant cells. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 5月, 2011 1 次提交
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由 Linus Walleij 提交于
This makes the PRCMU base address be selected at runtime for U8500 and U5500 instead of being compiled-in. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 1月, 2011 2 次提交
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由 Rabin Vincent 提交于
Dynamically detect the DBx500 SOC an revision based on the ASIC ID. Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
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由 Rabin Vincent 提交于
To allow the possiblity of building U8500 and U5500 support in the same image. Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> [Rebased to latest changes in Russells tree] Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
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- 08 12月, 2010 1 次提交
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由 Rabin Vincent 提交于
Rework gpio registration to remove build-time changing macros. Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
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- 02 9月, 2010 1 次提交
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由 Linus Walleij 提交于
This patch adds support for checking if the digital baseband (DB) System-on-Chip (aka "cpu) ASIC hardware version is 1.0, 1.1 or 2.0. We print the result in the bootlog, the functions are then used for runtime decisions based on hardware version. Signed-off-by: NMattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 5月, 2010 3 次提交
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由 Rabin Vincent 提交于
Add basic support for the U5500 platform. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Rabin Vincent 提交于
Split up all the hardware register definitions previously found in hardware.h into per-SoC files db8500-regs.h and db5500-regs.h. Rename a couple of macros to prepare for sharing code between the variants. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Rabin Vincent 提交于
This adds the different config options for SoCs DB8500 and DB5500 and refines the SoC/CPU detection code to support the DB5500 as well via these. The selection between DB5500 and DB8500 is currently a simple compile-time choice. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 3月, 2010 2 次提交
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由 Rabin Vincent 提交于
Add support for the GPIOs on the U8500, using the plat-nomadik GPIO driver. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Rabin Vincent 提交于
Add cpu_is_u8500{ed/v1}() functions to determine the variant based on the CPU id, add the changed peripheral addresses, and fixup the MTU address. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 3月, 2010 1 次提交
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由 Rabin Vincent 提交于
Correct the base addresses of the CLKRST registers. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 11月, 2009 1 次提交
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由 Srinidhi Kasagar 提交于
Adds register definitions, shared peripheral interrupt numbers (SHPI) and IO mappings for the U8500 core support. SHPI are assigned to [160:32] where first 32 interrupts are reserved. Reviewed-by: NAlessandro Rubin <rubini@unipv.it> Signed-off-by: Nsrinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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