1. 23 10月, 2013 1 次提交
  2. 14 10月, 2013 1 次提交
  3. 15 8月, 2013 3 次提交
  4. 22 7月, 2013 1 次提交
  5. 17 7月, 2013 5 次提交
  6. 29 6月, 2013 2 次提交
  7. 27 6月, 2013 4 次提交
  8. 13 6月, 2013 1 次提交
  9. 05 6月, 2013 1 次提交
  10. 04 6月, 2013 2 次提交
  11. 14 5月, 2013 1 次提交
  12. 17 4月, 2013 2 次提交
  13. 04 4月, 2013 2 次提交
  14. 27 3月, 2013 4 次提交
  15. 26 3月, 2013 1 次提交
  16. 25 3月, 2013 2 次提交
    • S
      ASoC: tegra: add Tegra114 support to tegra_asoc_utils.c · a7fc5d25
      Stephen Warren 提交于
      Tegra114 requires different PLL rates. Modify the code to know about
      this.
      
      On Tegra114 only for now, use regular clk_get() rather than clk_get_sys()
      to retrieve clocks. This assumes that the clocks will be represented in
      device tree. We can assure that from the start of any Tegra114 audio
      support. For older chips, I'll add the required clocks properties to the
      device trees this kernel cycle, and switch this code to only support the
      "new_clocks" path next cycle.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      a7fc5d25
    • S
      ASoC: tegra: add Tegra114 support to the AHUB driver · 95d36075
      Stephen Warren 提交于
      Tegra114's AHUB shares a design with Tegra30, with the followin changes:
      * Supports more (10 vs. 4) bi-directional FIFO channels into RAM.
      * Requires a separate block of registers to support the above.
      * Supports more attached clients, i.e. new audio multiplexing and
        de-multiplexing modules.
      * Is affected by more clocks due to the above.
      
      This change fully defines the device tree binding changes required to
      represent these changes, and minimally extends the driver to support
      the new hardware, without exposing any of the new FIFO channels.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      95d36075
  17. 05 3月, 2013 1 次提交
  18. 04 3月, 2013 6 次提交