1. 02 10月, 2014 2 次提交
  2. 29 9月, 2014 1 次提交
  3. 28 9月, 2014 1 次提交
  4. 20 9月, 2014 1 次提交
  5. 18 9月, 2014 1 次提交
  6. 17 9月, 2014 3 次提交
  7. 14 9月, 2014 1 次提交
  8. 12 9月, 2014 1 次提交
  9. 11 9月, 2014 1 次提交
    • M
      ARM: DT: imx53: fix lvds channel 1 port · 1b134c9c
      Markus Niebel 提交于
      using LVDS channel 1 on an i.MX53 leads to following error:
      
      imx-ldb 53fa8008.ldb: unable to set di0 parent clock to ldb_di1
      
      This comes from imx_ldb_set_clock with mux = 0. Mux parameter must be "1" for
      reparenting di1 clock to ldb_di1. The value of the mux param comes from device
      tree port settings.
      
      On i.MX5, the internal two-input-multiplexer is used. Due to hardware limitations,
      only one port (port@[0,1]) can be used for each channel (lvds-channel@[0,1],
      respectively)
      
      Documentation update suggested by Philipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: NMarkus Niebel <Markus.Niebel@tq-group.com>
      Fixes: e05c8c9a ("ARM: dts: imx53: Add IPU DI ports and endpoints, move imx-drm node to dtsi")
      Cc: <stable@vger.kernel.org>
      Acked-by: NPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      1b134c9c
  10. 06 9月, 2014 1 次提交
  11. 05 9月, 2014 3 次提交
  12. 03 9月, 2014 2 次提交
  13. 02 9月, 2014 1 次提交
  14. 01 9月, 2014 1 次提交
  15. 30 8月, 2014 1 次提交
    • G
      stmmac: ptp: fix the reference clock · 5566401f
      Giuseppe CAVALLARO 提交于
      The PTP reference clock, used for setting the addend in the Timestamp Addend
      Register, was erroneously hard-coded (as reported in the databook just as
      example).
      
      The patch removes the macro named: STMMAC_SYSCLOCK and allows to use a
      reference clock (clk_ptp_ref_i) that can be passed from the platform.
      
      If not passed, the main driver clock will be used as default; note that
      this can be fine on some platforms.
      
      Note that, prior this patch, using the old STMMAC_SYSCLOCK on some platforms,
      as side effect, the ptp clock can move faster/slower than the system clock.
      Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5566401f
  16. 29 8月, 2014 4 次提交
  17. 28 8月, 2014 3 次提交
  18. 27 8月, 2014 1 次提交
  19. 26 8月, 2014 1 次提交
    • R
      ARM: OMAP2+: GPMC: Support Software ECC scheme via DT · a3e83f05
      Roger Quadros 提交于
      For v3.14 and prior, 1-bit Hamming code ECC via software was the
      default choice for some boards e.g. 3430sdp.
      Commit ac65caf5 in v3.15 changed the behaviour
      to use 1-bit Hamming code via Hardware using a different ECC layout
      i.e. (ROM code layout) than what is used by software ECC.
      
      This ECC layout change causes NAND filesystems created in v3.14
      and prior to be unusable in v3.15 and later. So don't mark "sw" scheme
      as deperecated and support it.
      Signed-off-by: NRoger Quadros <rogerq@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      a3e83f05
  20. 21 8月, 2014 1 次提交
  21. 20 8月, 2014 2 次提交
  22. 18 8月, 2014 2 次提交
  23. 17 8月, 2014 4 次提交
  24. 16 8月, 2014 1 次提交