The length of the registers area for the Marvell 370/XP Ethernet controller
was incorrect in the .dtsi: 0x2500, while it should have been 0x4000.
This problem wasn't noticed because there used to be a static mapping for
all the MMIO register region set up by ->map_io().

The register length was fixed in all the other device tree files,
except from the armada-xp-mv78260.dtsi, in the following commit:

  commit cf8088c5
  Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  Date:   Tue May 21 12:33:27 2013 +0200

    arm: mvebu: fix length of Ethernet registers area in .dtsi

This commit fixes a kernel panic in mvneta_probe(), when the kernel
tries to access the unmapped registers:

[  163.639092] mvneta d0070000.ethernet eth0: mac: 6e:3c:4f:87:17:2e
[  163.646962] mvneta d0074000.ethernet eth1: mac: 6a:04:4e:6f:f5:ef
[  163.654853] mvneta d0030000.ethernet eth2: mac: 2a:99:19:19:fc:4c
[  163.661258] Unable to handle kernel paging request at virtual address f011bcf0
[  163.668523] pgd = c0004000
[  163.671237] [f011bcf0] *pgd=2f006811, *pte=00000000, *ppte=00000000
[  163.677565] Internal error: Oops: 807 [#1] SMP ARM
[  163.682370] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc6-01850-gba0682e #11
[  163.690046] task: ef04c000 ti: ef03e000 task.ti: ef03e000
[  163.695467] PC is at mvneta_probe+0x34c/0xabc
[...]
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Commit e4560010 (Merge tag 'msm-cleanup-for-3.11' of
git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into
next/cleanup) incorrectly resolved a merge conflict, resulting in a
node address that doesn't match the register address.

Fix this node address.
Signed-off-by: NDavid Brown <davidb@codeaurora.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This patch corrects the base address of pinctrl_3 on Exynos5250
platform.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Make sure hyp-stub.S gets removed during make distclean,
this left over file was introduced in commit:

424e5994 ARM: zImage/virt: hyp mode entry support for the zImage loader
Signed-off-by: NMagnus Damm <damm@opensource.se>
Acked-by: NDave Martin <dave.martin@linaro.org>
Reviewed-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This cleans up the gpio-msm-v2 driver of all the global define usage.
The number of gpios are now defined in the device tree. This enables
adding irqdomain support as well.
Signed-off-by: NRohit Vaswani <rvaswani@codeaurora.org>
Acked-by: NGrant Likely <grant.likely@linaro.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

The ranges DT entry needed by the PCIe controller is defined at the
SoC .dtsi level. However, some boards have a NOR flash, and to support
it, they need to override the SoC-level ranges property to add an
additional range. Since PCIe and NOR support came separately, some
boards were not properly changed to include the PCIe range in their
ranges property at the .dts level.

This commit fixes those platforms.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The previous mask values for the legacy ARM CPU IDs were conflicting
with the CPU ID assignments for late-generation CPUs (like the
Qualcomm MSM/QSD or Broadcom Brahma-15 processors). This change
corrects the legacy ARM CPU ID value so that the jump table can
fall-through to the appropriate cache maintenance / MMU functions.
Signed-off-by: NMarc C <marc.ceeeee@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

In August 2012, Matthew Gretton-Dann checked a change into binutils
labelled "Error on obsolete & warn on deprecated registers", apparently as
part of ARMv8 support. Apparently, this was supposed to emit the message
"Warning: This coprocessor register access is deprecated in ARMv8" when
using certain mcr/mrc instructions and building for ARMv8. Unfortunately,
the message that is actually emitted appears to be '(null)', which is
less helpful in comparison.

Even more unfortunately, this is biting us on every single kernel
build with a new gas, because arch/arm/boot/compressed/head.S and some
other files in that directory are built with -march=all since kernel
commit 80cec14a "[ARM] Add -march=all to assembly file build in
arch/arm/boot/compressed" back in v2.6.28.

This patch reverts Russell's nice solution and instead marks the head.S
file to be built for armv7-a, which fortunately lets us build all
instructions in that file without warnings even on the broken binutils.

Without this patch, building anything results in:

arch/arm/boot/compressed/head.S: Assembler messages:
arch/arm/boot/compressed/head.S:565: Warning: (null)
arch/arm/boot/compressed/head.S:676: Warning: (null)
arch/arm/boot/compressed/head.S:698: Warning: (null)
arch/arm/boot/compressed/head.S:722: Warning: (null)
arch/arm/boot/compressed/head.S:726: Warning: (null)
arch/arm/boot/compressed/head.S:957: Warning: (null)
arch/arm/boot/compressed/head.S:996: Warning: (null)
arch/arm/boot/compressed/head.S:997: Warning: (null)
arch/arm/boot/compressed/head.S:1027: Warning: (null)
arch/arm/boot/compressed/head.S:1035: Warning: (null)
arch/arm/boot/compressed/head.S:1046: Warning: (null)
arch/arm/boot/compressed/head.S:1060: Warning: (null)
arch/arm/boot/compressed/head.S:1092: Warning: (null)
arch/arm/boot/compressed/head.S:1094: Warning: (null)
arch/arm/boot/compressed/head.S:1095: Warning: (null)
arch/arm/boot/compressed/head.S:1102: Warning: (null)
arch/arm/boot/compressed/head.S:1134: Warning: (null)
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Cc: stable@vger.kernel.org
Cc: Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Selecting this option produces:

  AS      arch/arm/boot/compressed/debug.o
arch/arm/boot/compressed/debug.S:4:33: fatal error: mach/debug-macro.S: No such file or directory
compilation terminated.
make[3]: *** [arch/arm/boot/compressed/debug.o] Error 1

The semihosting support cannot be modelled into a senduart macro as
it requires memory space for argument passing.  So the
CONFIG_DEBUG_LL_INCLUDE may not have any sensible value and the include
directive should be omitted.

While at it, let's add proper semihosting output support to the
decompressor.
Signed-off-by: NNicolas Pitre <nico@linaro.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM.
The PWM capability property is missing from the node definitions of
couple of timers.

Add ti,timer-pwm attribute for timer 5, 6, 8 and 11.
Signed-off-by: NSuman Anna <s-anna@ti.com>
[benoit.cousson@linaro.org: Update changelog and subject to highlight
the fix]
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Earlier commits ensured proper muxing of pins related to proper
TWL6030 behavior: see commit 265a2bc8 (ARM: OMAP3: TWL4030: ensure
sys_nirq1 is mux'd and wakeup enabled) and commit 1ef43369 (ARM:
OMAP4: TWL: mux sys_drm_msecure as output for PMIC).

However these only fixed legacy boot and not DT boot.  For DT boot,
the default mux values need to be set properly in DT.

Special thanks to Nishanth Menon for the review and catching some
major flaws in earlier versions.

Tested on OMAP4430/Panda and OMAP4460/Panda-ES.

Cc: Nishanth Menon <nm@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: NKevin Hilman <khilman@linaro.org>
Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com>
[benoit.cousson@linaro.org: Slightly change the subject to align
board name with file name]
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

The gpmc driver is actually looking for "gpmc,num-cs" and
"gpmc,num-waitpins" properties in DT. The binding doc also states
this.
Correct the properties in the dts to provide the right values for the
gpmc driver.
Signed-off-by: NLars Poeschel <poeschel@lemonage.de>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Acked-by: NPekon Gupta <pekon@ti.com>
Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>

Stephen Warren reported the recent commit 78506f22 (add support for
extended FIFO-size of PL011-r1p5) breaks the serial port on the
BCM2835 ARM SoC.

A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs.
The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep
FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for
this compatibility issue, this patch overrides the HW UART periphid
register values with the actually compatible UART periphid 0x00241011
(r1p3 or r1p4).
Reported-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NJongsung Kim <neidhard.kim@lge.com>
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Some bad copy/paste got in as well as too many zeroes. Fix
everything up so that the registers after the @ sign are
consistent with the first reg property.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

The length of the registers area for the Marvell 370/XP Ethernet
controller was incorrect in the .dtsi: 0x2400 while it should have
been 0x4000. Until now, this problem wasn't noticed because there was
a large static mapping for all I/Os set up by ->map_io(). But since
we're going to get rid of this static mapping, we need to ensure that
the register areas are properly sized.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The length of the registers area for the Marvell 370/XP SATA
controller was incorrect in the .dtsi: 0x2400 while it should have
been 0x5000. Until now, this problem wasn't noticed because there was
a large static mapping for all I/Os set up by ->map_io(). But since
we're going to get rid of this static mapping, we need to ensure that
the register areas are properly sized.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The PA24 pin is wrongly assigned to peripheral B.
In the current config there is 2 ETX3 pins (PA11 and PA24) and
no ETXER pin (PA22).
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org> # 3.8+

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The CSPI controller has only one clock, but the driver spi-imx.c needs
clock "per" to calculate bitrate divisor.
Signed-off-by: NJonas Andersson <jonas@microbit.se>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The assignment of IRQ for the SMC91x ethernet adapter had two
problems making it non-working:

- It was not put into the ethernet device node. Let's do this
  by using the board-specific overlay, so we can make other
  overlays on other Nomadik boards.

- The IRQ number was actually completely wrong, this was the
  number for NHK8815, not S8815.

After this ethernet starts working on the USB S8815.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

During the conversion to the internal-regs' subnode, the L2-cache node
haven not been converted (due to a wrong choice made by myself during
the resolution of the merge conflict when I rebased the commit). This
leads to wrong address for L2 cache which prevent it to be used on
Armada 370. This commit fix the address reg of the e L2-cache node.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Adding usbphy node for Exynos5250 along with the
necessary device data to be parsed.
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Since 82a68267 ('ARM: dts: mvebu: Convert all the mvebu files to use
the range property') all the device nodes of Armada 370/XP are under a
common 'ranges' property that translates the device register addresses
into their absolute address, thanks to the base address of the
internal register space.

However, beyond just the register areas, there are also PCIe I/O and
memory regions, whose addresses should be properly translated. This
patch fixes the Armada 370 and XP ranges property to take PCIe into
account properly.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.
Signed-off-by: NVenu Byravarasu <vbyravarasu@nvidia.com>
[swarren: fixed some newly added regulator-name properties to better
match schematic, avoided duplicate regulator-name on Whistler.]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active
low nature of the GPIO.
2. Placed USB PHY DT node immediately below the EHCI controller DT nodes
and corrected reg value in the name of USB PHY DT node.
Signed-off-by: NVenu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

With the latest device tree reorganization which introduced the
'internal-reg' node, now the only region translated is the internal register's.
This makes the description of the hardware incomplete, for it lacks the
Device Bus childs address space.

In order to fix this, it's required to add a 'ranges' entry with a suitable
address space to map Device Bus childs, on a per-board basis.
This patch fixes the ranges property on the Armada XP GP board.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

to prepare the switch to the macro.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Commit ad871c10 (ARM: dts: OMAP: Add usb_otg and glue data to
OMAP3+ boards) added support for MUSB on omap3 for device tree,
but added the interrupts the wrong way probably as they were
copied from the omap4.dtsi file. On omap3 we have TI specific
interrupt controller, not GIC.

Fix this by specifying the interrupt following the TI INTC
binding.

Without this fix MUSB won't work as it is trying to use
irq0 instead of irq92.
Signed-off-by: NTony Lindgren <tony@atomide.com>

The "ti,no_idle_on_suspend" property was required to keep ocmcram clocks
running during idle.

But commit 72bb6f9b (ARM: OMAP: omap_device: don't attempt late suspend
if no driver bound), added in v3.6 should prevent any automatic clock
gating for devices without drivers bound.  Since there is no driver for
the OCM RAM block, we are not affected by the automatic idle on suspend
anyways which means "ti,no_idle_on_suspend" can be safely removed since
there are no users for it.

Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Rajendra nayak <rnayak@ti.com>
Signed-off-by: NSourav Poddar <sourav.poddar@ti.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NKevin Hilman <khilman@linaro.org>

Instead of requesting all available spi cs-gpios, request only the ones used on
the board, in our case on the cpu module.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org> # 3.8+

With the latest device tree reorganization which introduced the
'internal-reg' node, now the only region translated is the internal register's.
This makes the description of the hardware incomplete, for it lacks the
Device Bus childs address space.

In order to fix this, it's required to add a 'ranges' entry with a suitable
address space to map Device Bus childs, on a per-board basis.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The mpic alias is already defined in the common armada-370-xp.dtsi, so
there's no need to repeat it at the armada-xp.dtsi and armada-370.dtsi
level.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Commit b00adbe0 ("ARM: sunxi: Rename uart nodes to serial") changed the
node names in the DTSI, changes that were not accordingly made to the
Mini X-Plus device tree. This breakage slipped through because it was
not properly declared in the Makefile.

Fix both issues.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The 'samsung,vbus-gpio' was submitted before pinmux landed for
exynos5250 and uses the old-style gpio specifier.  Fix the two
exynos5250 boards that use it.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Trivial patch, adding the i2c Cypress trackpad used on Snow.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>