- 15 7月, 2014 6 次提交
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由 Kishon Vijay Abraham I 提交于
Added dt data for PCIe PHY control module used by PCIe PHY. The documention for this node can be found @ ../bindings/phy/ti-phy.txt Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Kishon Vijay Abraham I 提交于
Added missing clocks used by second instance of PCIe PHY. The documention for this nodes can be found @ ../bindings/clock/ti/gate.txt. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Kishon Vijay Abraham I 提交于
There are two instances of PCIe PHY in DRA7xx. So renamed optfclk_pciephy_32khz, optfclk_pciephy_clk and optfclk_pciephy_div_clk to optfclk_pciephy1_32khz, optfclk_pciephy1_clk and optfclk_pciephy1_div_clk respectively. This is needed for adding the clocks for second PCIe PHY instance. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Kishon Vijay Abraham I 提交于
Added missing 32KHz clock used by PCIe PHY. Figure 26-19. PCIe PHY Subsystem Integration in vE of DRA7xx ES1.0 TRM shows 32KHz is used by PCIe PHY. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck from dpll_pcie_ref_ck. Figure 26-22. DPLL_PCIE_REF Functional Block Diagram in vE of DRA7xx ES1.0 TRM shows the signal name for the output of post divider (M2) is CLKOUTLDO. Figure 26-21. PCIe PHY Clock Generator Overview shows CLKOUTLDO is used as input to apll mux. So the actual output of dpll is dpll_pcie_ref_m2ldo_ck which is also the input of apll. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
Add divider table to optfclk_pciephy_div clock. The 8th bit of CM_CLKMODE_APLL_PCIE can be programmed to either 0x0 or 0x1 based on if the divider value is 0x2 or 0x1. Figure 26-21. PCIe PHY Clock Generator Overview in vE of DRA7xx ES1.0 shows the block diagram of Clock Generator Subsystem of PCIe PHY module. The divider value if '1' should be programmed in order to get the correct PCIE_PHY_DIV_GCLK frequency (2.5GHz). Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 7月, 2014 7 次提交
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由 Roger Quadros 提交于
The ldousb_reg regulator provides power to the USB1 and USB2 High Speed PHYs. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
Add TPS65218 device tree nodes. i2c clock frequency setting also added as part of tps65218 nodes addition. As i2c clock enabling is required. Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
Fix i2c nodes indentation. Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
Add TPS65218 device tree nodes. i2c clock frequency setting also added as part of tps65218 nodes addition. As i2c clock enabling is required. Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ash Charles 提交于
This adds the Gumstix Pepper[1] single-board computer based on the TI AM335x processor. Schematics are available [2]. [1] https://store.gumstix.com/index.php/products/344/ [2] https://pubs.gumstix.com/boards/PEPPER/Signed-off-by: NAsh Charles <ashcharles@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 R Sricharan 提交于
There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The Peripheral irq requests are connected to only one crossbar input and the output of the crossbar is connected to only one controller's input line. The crossbar device is used to map a peripheral input to a free mpu's interrupt controller line. Here, adding a new crossbar device node and replacing all the peripheral interrupt numbers with its fixed crossbar input lines. Signed-off-by: NSricharan R <r.sricharan@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 R Sricharan 提交于
There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Signed-off-by: NSricharan R <r.sricharan@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 7月, 2014 2 次提交
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由 Tero Kristo 提交于
Otherwise legacy boot clock data is used. This patch also includes the clock data files to the base dtsi files. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Darren Etheridge 提交于
Add the necessary nodes to enable the LCD controller and the LCD panel that is attached to the Texas Instruments AM335x EVMSK platform. Also setup the necessary pin mux within the DT file to drive the LCD connector and add the correct pinmux settings for the lcd pins to be configured to when the SoC goes into sleep state for the minimum power consumption. For the sleep mode LCD pin settings, MUX_MODE7 is chosen as this corresponds to switching the pins into input GPIO's with an internal pulldown. Which has been determined to offer the lowest power solution vs leaving the pins configured in LCD mode. Signed-off-by: NDarren Etheridge <detheridge@ti.com> Acked-by: NWolfram Sang <wsa@sang-engineering.com> Tested-by: NFelipe Balbi <balbi@ti.com> Acked-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 7月, 2014 2 次提交
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由 Felipe Balbi 提交于
Add support for TI's AM437x StarterKit Evaluation Module. Cc: Josh Elliot <jelliott@ti.com> Signed-off-by: NFelipe Balbi <balbi@ti.com> Tested-by: NFranklin Cooper Jr. <fcooper@ti.com> Tested-by: NTom Rini <trini@ti.com> Tested-by: NDarren Etheridge <detheridge@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Felipe Balbi 提交于
By providing labels for rtc, wdt, cpu and dispc nodes, boards can access them to add board-specific data. Signed-off-by: NFelipe Balbi <balbi@ti.com> Tested-by: NFranklin Cooper Jr. <fcooper@ti.com> Tested-by: NTom Rini <trini@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 6月, 2014 1 次提交
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由 Nishanth Menon 提交于
OMAP5432, DRA75x and DRA72x have MPU DPLLs that need Duty Cycle Correction(DCC) to operate safely at frequencies >= 1.4GHz. Switch to "ti,omap5-mpu-dpll-clock" compatible property which provides this support. Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 03 6月, 2014 14 次提交
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由 Jyri Sarha 提交于
Adds HDMI audio sDMA properties. Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Jyri Sarha 提交于
Adds HDMI audio sDMA properties. Signed-off-by: NJyri Sarha <jsarha@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Florian Vaussard 提交于
Add the necessary DTS nodes to enable the micro-HDMI output on Parlor board. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Florian Vaussard 提交于
Alto35 expansion board has a ZIF connector for a 3.5'' LCD. Add a common include file for this configuration, and use it on Alto35. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Florian Vaussard 提交于
Chestnut43, Gallop43 and Palo43 expansion boards have a ZIF connector for a 4.3'' LCD. Add a common include file for this configuration, and use it on relevant expansion boards. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Florian Vaussard 提交于
Summit and Tobi expansion boards have a HDMI connector with a TFP410 encoder. Add a common include file for this configuration, and then use it for Summit and Tobi. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Looks like quite a few omap3 boards have sharp ls037v7dw01 that's configured as various panel dpi entries for whatever legacy reasons. For device tree based support, let's just configure these properly for panel ls037v7dw01 instead of panel dpi. This patch creates a common file for panel ls037v7dw01, and makes boards ldp and omap3-evm to use it. The ls037v7dw01 also seems to be coupled with an ad7846 touchscreen controller for the omaps, so let's add a basic configuration for the touchscreen also using the default values. Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Marek Belisko 提交于
This patch add support for lcd display on gta04 board. Display control is connected to spi (used spi bitbang driver). Signed-off-by: NMarek Belisko <marek@goldelico.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Tomi Valkeinen 提交于
omap5-uevm has a single HDMI output. Add the necessary display information, including pinmuxing. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Tomi Valkeinen 提交于
omap5-uevm has a tca6424a I/O expander. Add it to the .dts file. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Tomi Valkeinen 提交于
Add OMAP5 DSS nodes to omap5.dtsi. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Tomi Valkeinen 提交于
Add DT data for am43x-epos-evm's LCD panel. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Sathya Prakash M R 提交于
Add DT data for am437x-gp-evm's LCD panel. Signed-off-by: NSathya Prakash M R <sathyap@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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由 Sathya Prakash M R 提交于
Add DT data for the display subsystem for AM4372. The DSS on AM4372 is basically OMAP3's DSS, without DSI and VENC blocks. Signed-off-by: NSathya Prakash M R <sathyap@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTony Lindgren <tony@atomide.com>
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- 31 5月, 2014 8 次提交
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由 Tushar Behera 提交于
Arndale-Octa board is always configured to work with trustzone firmware binary. Added DTS node entry to enable this support. Signed-off-by: NTushar Behera <tushar.behera@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Chanwoo Choi 提交于
This patch add pmusysreg node for Exynos3250 to access PMU (Power Management Unit) register in a centralized way using syscon driver. Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Arun Kumar K 提交于
The vbus-supply property is wrongly updated in the usbdrd node instead of the usbdrd_phy node. This patch fixes the same. Signed-off-by: NArun Kumar K <arun.kk@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Arun Kumar K 提交于
The vbus-supply property is wrongly updated in the usbdrd node instead of the usbdrd_phy node. This patch fixes the same. Signed-off-by: NArun Kumar K <arun.kk@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tarek Dakhran 提交于
Add initial device tree nodes for EXYNOS5410 SoC and SMDK5410 board. Signed-off-by: NTarek Dakhran <t.dakhran@samsung.com> Signed-off-by: NVyacheslav Tyrtov <v.tyrtov@samsung.com> Reviewed-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
This patch adds new exynos3250.dtsi to support Exynos3250 SoC based on Cortex-A7 dual core and includes following dt nodes: - GIC interrupt controller - Pinctrl to control GPIOs - Clock controller - CPU information (Cortex-A7 dual core) - UART to support serial port - MCT (Multi Core Timer) - ADC (Analog Digital Converter) - I2C/SPI bus - Power domain - PMU (Performance Monitoring Unit) - MSHC (Mobile Storage Host Controller) - PWM (Pluse Width Modulation) - AMBA bus - sysram node for SYSRAM memory mapping Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NHyunhee Kim <hyunhee.kim@samsung.com> Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: devicetree@vger.kernel.org Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Arun Kumar K 提交于
Adds the mfc node to exynos5800 which uses MFCv8. Signed-off-by: NArun Kumar K <arun.kk@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Vivek Gautam 提交于
Add required fixed-regulator for VBUS supply for USB 3.0 controller phy. Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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