1. 22 12月, 2010 6 次提交
    • P
      OMAP4: PRCM: reorganize existing OMAP4 PRCM header files · d198b514
      Paul Walmsley 提交于
      Split the existing cm44xx.h file into cm1_44xx.h and cm2_44xx.h files
      so they match their underlying OMAP hardware modules.  Add clockdomain
      offset information.
      
      Add header files for the MPU local PRCM, prcm_mpu44xx.h, and for the
      SCRM, scrm44xx.h.  SCRM register offsets still need to be added; TI
      should do this.
      
      Move the "_MOD" macros out of the prcm-common.h header file, into the
      header file of the hardware module that they belong to.  For example,
      OMAP4430_PRM_*_MOD macros have been moved into the prm44xx.h header.
      
      Adjust #includes of all files that used the old PRCM header file names
      to point to the new filenames.
      
      The autogeneration scripts have been updated accordingly.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Reviewed-by: NKevin Hilman <khilman@deeprootsystems.com>
      Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
      Tested-by: NRajendra Nayak <rnayak@ti.com>
      Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      d198b514
    • R
      OMAP2+: hwmod: Update the sysc_cache in case module context is lost · 233cbe5b
      Rajendra Nayak 提交于
      Do not skip the sysc programming in the hmwod framework based
      on the cached value alone, since at times the module might have lost
      context (due to the Powerdomain in which the module belongs
      transitions to either Open Switch RET or OFF).
      
      Identifying if a module has lost context requires atleast one
      register read, and since a register read has more latency than
      a write, it makes sense to do a blind write always.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      233cbe5b
    • P
      OMAP2+: hwmod: upgrade per-hwmod mutex to a spinlock · dc6d1cda
      Paul Walmsley 提交于
      Change the per-hwmod mutex to a spinlock.  (The per-hwmod lock
      serializes most post-initialization hwmod operations such as enable,
      idle, and shutdown.)  Spinlocks are needed, because in some cases,
      hwmods must be enabled from timer interrupt disabled-context, such as
      an ISR.  The current use-case that is driving this is the OMAP GPIO
      block ISR: it can trigger interrupts even with its clocks disabled,
      but these clocks are needed for register accesses in the ISR to succeed.
      
      This patch also effectively reverts commit
      84824022 - this patch makes
      _omap_hwmod_enable() and _omap_hwmod_init() static, renames them back
      to _enable() and _idle(), and changes their callers to call the
      spinlocking versions.  Previously, since omap_hwmod_{enable,init}()
      attempted to take mutexes, these functions could not be called while
      the timer interrupt was disabled; but now that the functions use
      spinlocks and save and restore the IRQ state, it is appropriate to
      call them directly.
      
      Kevin Hilman <khilman@deeprootsystems.com> originally proposed this
      patch - thanks Kevin.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      dc6d1cda
    • P
      OMAP2+: hwmod: add support for per-class custom device reset functions · bd36179e
      Paul Walmsley 提交于
      The standard omap_hwmod.c _reset() code relies on an IP block's
      OCP_SYSCONFIG.SOFTRESET register bit to reset the IP block.  This
      works for most IP blocks on the chip, but unfortunately not all.  For
      example, initiator-only IP blocks often don't have any MPU-accessible
      OCP-header registers, and therefore the MPU can't write to any
      OCP_SYSCONFIG registers in that block.  Other IP blocks, such as the
      IVA and I2C, require a specialized reset sequence.
      
      Since we need to be able to reset these IP blocks as well, allow
      custom IP block reset functions to be passed into the hwmod code via a
      per-hwmod-class reset function pointer, struct omap_hwmod_class.reset.
      If .reset is non-null, then the hwmod _reset() code will call the custom
      function instead of the standard OCP SOFTRESET-based code.
      
      As part of this change, rename most of the existing _reset() function
      code to _ocp_softreset(), to indicate more clearly that it does not work
      for all cases.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Paul Hunt <hunt@ti.com>
      Cc: Stanley Liu <stanley_liu@ti.com>
      bd36179e
    • P
      OMAP2+: hwmod: add postsetup state · 2092e5cc
      Paul Walmsley 提交于
      Allow board files and OMAP core code to control the state that some or
      all of the hwmods end up in at the end of _setup() (called by
      omap_hwmod_late_init() ).  Reimplement the old skip_setup_idle code in
      terms of this new postsetup state code.
      
      There are two use-cases for this patch: the !CONFIG_PM_RUNTIME case,
      in which all IP blocks should stay enabled after _setup() finishes;
      and the MPU watchdog case, in which the watchdog IP block should enter
      idle if watchdog coverage of kernel initialization is desired, and
      should be disabled otherwise.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Charulatha Varadarajan <charu@ti.com>
      2092e5cc
    • P
      OMAP2+: hwmod: allow custom pre-shutdown functions · e4dc8f50
      Paul Walmsley 提交于
      Some OMAP IP blocks, such as the watchdog timers, cannot be completely
      shut down via the standard hwmod shutdown mechanism.  This patch
      enables the hwmod data files to supply a pointer to a custom
      pre-shutdown function via the struct omap_hwmod_class.pre_shutdown
      function pointer.  If the struct omap_hwmod_class.pre_shutdown
      function pointer is non-null, the function will be executed before the
      existing hwmod shutdown code runs.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      e4dc8f50
  2. 09 10月, 2010 1 次提交
  3. 25 9月, 2010 1 次提交
  4. 22 9月, 2010 11 次提交
    • P
      OMAP: hwmod: improve documentation, clean up function names · 74ff3a68
      Paul Walmsley 提交于
      This patch:
      
      - adds more documentation to the hwmod code
      
      - fixes some documentation typos elsewhere in the file
      
      - changes the _sysc_*() function names to appear in (verb, noun) order,
        to match the rest of the function names.
      
      This patch should not result in any functional change.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      74ff3a68
    • R
      OMAP: hwmod: Enable module wakeup if in smartidle · 9980ce53
      Rajendra Nayak 提交于
      If a module's OCP slave port is programmed to be in smartidle,
      its also necessary that they have module level wakeup enabled.
      Update _sysc_enable in hwmod framework to do this.
      
      The thread "[PATCH 7/8] : Hwmod api changes" archived here:
      
      http://www.mail-archive.com/linux-omap@vger.kernel.org/msg34212.html
      
      has additional technical information on the rationale of this patch.
      
      Sergei Shtylyov <sshtylyov@mvista.com> identified an indentation
      problem with this patch - thanks, Sergei.
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NPartha Basak <p-basak2@ti.com>
      Signed-off-by: NBenoît Cousson <b-cousson@ti.com>
      [paul@pwsan.com: revised patch description]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Sergei Shtylyov <sshtylyov@mvista.com>
      9980ce53
    • B
      OMAP: hwmod: Fix softreset for modules with optional clocks · 96835af9
      Benoit Cousson 提交于
      Some modules (like GPIO, DSS...) require optionals clock to be enabled
      in order to complete the sofreset properly.
      Add a HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to force all optional clocks
      to be enabled before reset. Disabled them once the reset is done.
      
      TODO:
      For the moment it is very hard to understand from the HW spec, which
      optional clock is needed and which one is not. So the current approach
      will enable all the optional clocks.
      Paul proposed a much finer approach that will allow to tag only the needed
      clock in the optional clock table. This might be doable as soon as we have
      a clear understanding of these dependencies.
      Reported-by: NPartha Basak <p-basak2@ti.com>
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      96835af9
    • B
      OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs · 2cb06814
      Benoit Cousson 提交于
      In OMAP3 a specific SYSSTATUS register was used to get the softreset status.
      Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
      use the SYSC softreset bit to provide the status.
      
      Other cases might exist:
      - Some IPs like McBSP does have a softreset control but no reset status.
      - Some IPs that represent subsystem, like the DSS, can contains
      a reset status without softreset control. The status is the aggregation
      of all the sub modules reset status.
      
      - Add a new flag (SYSC_HAS_RESET_STATUS) to identify the new programming model
      and replace the previous SYSS_MISSING, that was used to flag IP with
      softreset control but without the SYSSTATUS register, with a specific
      SYSS_HAS_RESET_STATUS flag.
      
      - MCSPI and MMC contains both programming models, so the legacy one
      will be prevented by removing the syss offset field that become useless.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      2cb06814
    • P
      OMAP: hwmod: add an hardreset API for use by other core code · aee48e3c
      Paul Walmsley 提交于
      Expose an hardreset API from hwmod in order to assert / deassert all the
      individual reset lines that belong to an hwmod.  This API is needed by
      some of the more complicated processor drivers, e.g., DSP/Bridge,
      Syslink, etc.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      aee48e3c
    • B
      OMAP: hwmod: Force a softreset during _setup · 76e5589e
      Benoit Cousson 提交于
      Force the softreset of every IPs during the _setup phase.
      IPs that cannot support softreset or that should not
      be reset must set the HWMOD_INIT_NO_RESET flag in the
      hwmod struct.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
      76e5589e
    • B
      OMAP: hwmod: Add hardreset management support · 5365efbe
      Benoît Cousson 提交于
      Most processor IPs does have a hardreset signal controlled by the PRM.
      This is different of the softreset used for local IP reset from the
      SYSCONFIG register.
      The granularity can be much finer than orginal HWMOD, for ex, the IVA
      hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
      Since this granularity is needed by the driver, we have to ensure
      than one hwmod exist for each hardreset line.
      
      - Store reset lines as hwmod resources that a driver can query by name like
        an irq or sdma line.
      
      - Add two functions for asserting / deasserting reset lines in hwmods
        processor that require manual reset control.
      - Add one functions to get the current reset state.
      - If an hwmod contains only one line, an automatic assertion / de-assertion
        is done.
        -> de-assert the hardreset line only during enable from disable transition
        -> assert the hardreset line only during shutdown
      
      Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
      kept in INITIALIZED state.
      They can be properly enabled only if the hardreset line is de-asserted
      before.
      
      For information here is the list of IPs with HW reset control
      on an OMAP4430 device:
      
      RM_DSP_RSTCTRL
        1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
        0,0,'RST1','RW','1','DSP - DSP reset control'
      
      RM_IVA_RSTCTRL
        2,2,'RST3','RW','1','IVA logic and SL2 reset control'
        1,1,'RST2','RW','1','IVA Sequencer2 reset control'
        0,0,'RST1','RW','1','IVA sequencer1 reset control'
      
      RM_IPU_RSTCTRL
        2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
        1,1,'RST2','RW','1','IPU Cortex M3 CPU2  reset control.'
        0,0,'RST1','RW','1','IPU Cortex M3 CPU1  reset control.'
      
      PRM_RSTCTRL
        1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
        0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
      
      RM_CPU0_CPU0_RSTCTRL
      RM_CPU1_CPU1_RSTCTRL
        0,0,'RST','RW','0','Cortex A9 CPU0&1 warm local reset control'
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      [paul@pwsan.com: made the hardreset functions static; moved the register
       twiddling into prm*.c functions in previous patches; changed the
       function names to conform with hwmod practice]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      5365efbe
    • K
      OMAP: hwmod: separate list locking and hwmod hardware locking · 12b1fdb4
      Kevin Hilman 提交于
      Currently omap_hwmod_mutex is being used to protect both the list
      access/modification and concurrent access to hwmod functions.  This
      patch separates these two types of locking.
      
      First, omap_hwmod_mutex is used only to protect access and
      modification of omap_hwmod_list.  Also cleaned up some comments
      referring to this mutex that are no longer needed.
      
      Then, for protecting concurrent access to hwmod functions, use a
      per-hwmod mutex.  This protects concurrent access to a single hwmod,
      but would allow concurrent access to different hwmods.
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      [paul@pwsan.com: added structure documentation; changed mutex variable
       name]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      12b1fdb4
    • L
      OMAP: hwmod: Fix omap_hwmod_reset wrong state test · 9b579114
      Liam Girdwood 提交于
      The reset function wrongly used the state flag as a bit mask and was trying
      to re-enable after a reset.
      
      hwmod is still enabled for the PRCM point of view after a softreset
      so there is no need to re-enable.
      
      Remove the state check from omap_hwmod_reset since the _reset
      function is checking that as well and in addition can generate
      a warning
      Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
      [b-cousson@ti.com: remove the wrong test, remove the re-enable]
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      9b579114
    • B
      OMAP: hwmod: Do not disable clocks if hwmod already in idle · 3827f949
      Benoit Cousson 提交于
      The disable function was disabling clocks and dependencies
      from both enable and idle state. Since idle function is already
      disabling both, an enable -> idle -> disable sequence will
      try to disable twice the clocks and thus generate a
      "Trying disable clock XXX with 0 usecount" warning.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
      3827f949
    • B
      OMAP: hwmod: Rename dma_ch to dma_req · 9ee9fff9
      Benoit Cousson 提交于
      The dma request line attribute was named dma channel, which leads
      to confusion with the real dma channel definition.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
      9ee9fff9
  5. 27 7月, 2010 4 次提交
    • P
      OMAP2+: hwmod/device: update documentation and copyright · 887adeac
      Paul Walmsley 提交于
      Update some minor documentation issues and update copyright for
      omap_device/omap_hwmod code.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      887adeac
    • P
      OMAP: hwmod/device: add omap_{device,hwmod}_get_mpu_rt_va · db2a60bf
      Paul Walmsley 提交于
      Add omap_device_get_mpu_rt_va().  This is intended to be used by
      device drivers (currently, via a struct platform_data function
      pointer) to retrieve their corresponding device's virtual base address
      that the MPU should use to access the device.  This is needed because
      the omap_hwmod code does its own ioremap(), in order to gain access to
      the module's OCP_SYSCONFIG register.
      
      Add omap_hwmod_get_mpu_rt_va().  omap_device_get_mpu_rt_va() calls this
      function to do the real work.
      
      While here, rename struct omap_hwmod._rt_va to struct
      omap_hwmod._mpu_rt_va, to reinforce that it refers to the MPU's
      register target virtual address base (as opposed to, for example, the
      L3's).
      
      In the future, this belongs as a function in an omap_bus, so it is not
      necessary to call this through a platform_data function pointer.
      
      The use-case for this function was originally presented by Santosh
      Shilimkar <santosh.shilimkar@ti.com>.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      db2a60bf
    • P
      OMAP: hwmod: allow omap_hwmod_late_init() caller to skip module idle in _setup() · 97d60162
      Paul Walmsley 提交于
      On kernels that don't use the omap_device_enable() calls to enable
      devices, leave all on-chip devices enabled in hwmod _setup().
      Otherwise, accesses to those devices are likely to fail, crashing the
      system.  It's expected that kernels built without CONFIG_PM_RUNTIME
      will be the primary use-case for this.  This functionality is
      controlled by adding an extra parameter to omap_hwmod_late_init().
      
      This patch is based on the patch "OMAP: hwmod: don't auto-disable
      hwmod when !CONFIG_PM_RUNTIME" by Kevin Hilman
      <khilman@deeprootsystems.com>.
      
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      97d60162
    • K
      OMAP: hwmod: add non-locking versions of enable and idle functions · 84824022
      Kevin Hilman 提交于
      Some hwmods may need to be idled/enabled in atomic context, so
      non-locking versions of these functions are required.
      
      Most users should not need these and usage of theses should be
      controlled to understand why access is being done in atomic context.
      For this reason, the non-locking functions are only exposed at the
      hwmod level and not at the omap-device level.
      
      The use-case that led to the need for the non-locking versions is
      hwmods that are enabled/idled from within the core idle/suspend path.
      Since interrupts are already disabled here, the mutex-based locking in
      hwmod can sleep and will cause potential deadlocks.
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      84824022
  6. 24 6月, 2010 1 次提交
  7. 21 5月, 2010 9 次提交
  8. 15 5月, 2010 1 次提交
  9. 31 3月, 2010 1 次提交
  10. 25 2月, 2010 3 次提交
    • P
      OMAP hwmod: add hwmod class support · 43b40992
      Paul Walmsley 提交于
      Add support for categorizing and iterating over hardware IP blocks by
      the "class" of the IP block.  The class is the type of the IP block:
      e.g., "timer", "timer1ms", etc.  Move the OCP_SYSCONFIG/SYSSTATUS data
      from the struct omap_hwmod into the struct omap_hwmod_class, since
      it's expected to stay consistent for each class.  While here, fix some
      comments.
      
      The hwmod_class structures in this patch were designed and proposed by
      Benoît Cousson <b-cousson@ti.com> and were refined in a discussion
      between Thara Gopinath <thara@ti.com>, Kevin Hilman
      <khilman@deeprootsystems.com>, and myself.
      
      This patch uses WARN() lines that are longer than 80 characters, as
      Kevin noted a broader lkml consensus to increase greppability by
      keeping the messages all on one line.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NBenoît Cousson <b-cousson@ti.com>
      Cc: Thara Gopinath <thara@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      43b40992
    • P
      OMAP hwmod: convert hwmod to use hardware clock names rather than clkdev dev+con · 50ebdac2
      Paul Walmsley 提交于
      The OMAP hwmod core code is intended to use SoC IP block description
      structures that are autogenerated from TI's OMAP hardware database.
      Currently the hwmod code uses clkdev device + connection addressing to
      identify clocks.  This causes problems in the hwmod autogeneration
      process, since the TI hardware database doesn't use platform_device or
      clkdev addressing; it uses a single clock signal name string, which
      tends to bear some resemblance to what is used in the OMAP TRMs.  This
      patch converts the hwmod code and existing data to use omap_clk_get_by_name(),
      introduced in the previous patch.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      50ebdac2
    • T
      OMAP3: hwmod: support to specify the offset position of various SYSCONFIG register bits. · 358f0e63
      Thara Gopinath 提交于
      In OMAP3 Some modules like Smartreflex do not have the regular sysconfig
      register.Instead clockactivity bits are part of another register at a
      different bit position than the usual bit positions 8 and 9.
      
      In OMAP4, a new scheme is available  due to the new protocol
      between the PRCM and the IPs. Depending of the scheme, the SYSCONFIG
      bitfields position will be different.
      The IP_REVISION register should be at offset 0x00.
      It should contain a SCHEME field. From this we can determine whether
      the IP follows legacy scheme or the new scheme.
      
      31:30 SCHEME  Used to distinguish between old scheme and current.
       Read 0x0:  Legacy protocol.
       Read 0x1:  New PRCM protocol defined for new OMAP4 IPs
      
      For legacy IP
       13:12 MIDLEMODE
       11:8  CLOCKACTIVITY
       6     EMUSOFT
       5     EMUFREE
       4:3   SIDLEMODE
       2     ENAWAKEUP
       1     SOFTRESET
       0     AUTOIDLE
      
      For new OMAP4 IP's, the bit position in SYSCONFIG is (for simple target):
       5:4   STANDBYMODE (Ex MIDLEMODE)
       3:2   IDLEMODE (Ex SIDLEMODE)
       1     FREEEMU (Ex EMUFREE)
       0     SOFTRESET
      
      Unfortunately In OMAP4 also some IPs will not follow any of these
      two schemes. This is the case at least for McASP, SmartReflex
      and some security IPs.
      
      This patch introduces a new field sysc_fields in omap_hwmod_sysconfig which
      can be used by the hwmod structures to specify the offsets for the
      sysconfig register of the IP.Also two static structures
      omap_hwmod_sysc_type1 and omap_hwmod_sysc_type2 are defined
      which can be used directly to populate the sysc_fields if the IP follows
      legacy or new OMAP4 scheme. If the IP follows none of these two schemes
      a new omap_hwmod_sysc_fields structure has to be defined and
      passed as part of omap_hwmod_sysconfig.
      Signed-off-by: NThara Gopinath <thara@ti.com>
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      358f0e63
  11. 27 1月, 2010 2 次提交