- 30 3月, 2017 40 次提交
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由 Andrey Grodzovsky 提交于
Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAndrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: NKen Wang <Qingqing.Wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
This patch introduces a new flag named "amdgpu_firmware_load_type" to handle different firmware loading method. Since Vega10, there are three ways to load firmware. It would be better to use a flag and a fw_load_type kernel parameter to configure it. Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 ken 提交于
Signed-off-by: Nken <Qingqing.Wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ken Wang 提交于
Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NKen Wang <Qingqing.Wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ken Wang 提交于
These are used by various IP modules. Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NKen Wang <Qingqing.Wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Felix Kuehling 提交于
This header defines the gfx v9 MEC structures. Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NFelix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: NShaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the Video Compression Engine registers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the Unifed Video Decoder registers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the THerMal control registers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the System Managment Unit IO registers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the System DMA register headers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the OS Services register headers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the Bus IO registers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the Bus InterFace registers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
MP is the system management controller on vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Add the MultiMedia Hub registers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the Host Data Path registers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Add the Graphics Core register headers for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These are the register headers for the Display and Composition Engine on vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
ATHUB is part of the memory controller on soc15 asics. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This adds the register bitfield enums for vega10. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This header defines the IP layout for soc15 based SoCs. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This adds basic support for asics that use atomfirmware.h to define their vbios tables. v2: rebase v3: squash in num scratch reg fix Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NKen Wang <Qingqing.Wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
There will be a slightly different version for atomfirmware. Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NKen Wang <Qingqing.Wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Supposedly atomfirmware rom header is 3.3 atombios is 1.1. v2: rebased on newer kernel Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
soc15 asics have a new vbios interface. These headers define that interface. Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nicolai Hähnle 提交于
We will add the fence to freed buffer objects in a later commit, to ensure that the underlying memory can only be re-used after all references in page tables have been cleared. Signed-off-by: NNicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Huang 提交于
Power containment will degrade performance in some compute tests. Restore disabling it as before code refining in powerplay. v2: only in the compute profile Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: NFelix Kuehling <felix.kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
The ring structure already has what we need. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Avoids passing around additional parameters during setup. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Everything we need is in the ring structure. No need to pass all the bits explicitly. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
It's required. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
No need to loop through the compute queues twice. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
If KIQ isn't working, the compute rings won't work either. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
It's required. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
To better match where they are used. Called from sw_init and sw_fini. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
load mc ucode in driver if VBIOS not loaded a full version of MC ucode, Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: Njimqu <Jim.Qu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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