This produced a warning on my build, not sure why super-warning-man didn't
notice this one, its much worse than the %z one.
Signed-off-by: NDave Airlie <airlied@redhat.com>

For the fifteen bazillionth time.

See also commits f06da264 and
aeb565df ("i915: Fix more size_t format
string warnings" and "Fix annoying DRM_ERROR() string warning").

Grr-target: Eric Anholt <eric@anholt.net>
Grr-target: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Update bdb_lvds_options structure according to its defination in
2D driver. Then we can parse and set 'lvds_dither' bit correctly
on non-965 chips.
Signed-off-by: NLi Peng <peng.li@intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

I've hit the occasional oops inside i915_wait_ring() with an indication of
a NULL derefence of dev->primary->master.  Adding a NULL check is
consistent with the other potential users of dev->primary->master.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NEric Anholt <eric@anholt.net>

Check that the encoder has a real enabled crtc for TV detect, and fix
missing TV type setting after detect.
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

Fix TV control save register for untouched bits, and color
knobs different definition for 945 and 965 chips.
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

The get_modes hook must return the number of modes added.  This also fixes
TV mode's clock calculation int overflow issue, and use 0.01 precision for
mode refresh validation.
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

This covers:
Use long crt hotplug activation time on GM45.
Signed-off-by: NZhao Yakui <yakui.zhao@intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

This covers:
Limit CRT DAC speed better.

and also clears the border color in case it's set to some garbage, which would
fix ugly outlines in the blank regions of the CRT.
Signed-off-by: NZhao Yakui <yakui.zhao@intel.com>
[anholt: replaced *drm_dev with *dev]
Signed-off-by: NEric Anholt <eric@anholt.net>

This covers at least:
TV: subcarrier fix for NTSC and PAL
TV: fix timing parameters for PAL, 480p, 1080i
Signed-off-by: NZhenyu Wang <zhenyu.z.wang@intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

This is a G33-like desktop and mobile chipset.
Signed-off-by: NShaohua Li <shaohua.li@intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

agp_chipset_flush() is for flushing the intel GMCH write cache via the
IFP, these two uses are for when we're getting the object into the cpu
READ domain, and thus should not be needed. This confused me when I was
getting my head around the code.

With thanks to airlied for helping me check my mental picture of how the
flushes and clflushes are supposed to be used.
Signed-off-by: NOwain G. Ainsworth <oga@openbsd.org>
Signed-off-by: NEric Anholt <eric@anholt.net>

Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NEric Anholt <eric@anholt.net>

This was inspired by a patch by Chris Wilson, though none of it applied in any
way due to the debugfs work and I decided to change the formatting of the
new information anyway.
Signed-off-by: NEric Anholt <eric@anholt.net>

Here we eliminate a few functions in favor of using a single function
to dump from all of the object lists.
Signed-Off-By: NBen Gamari <bgamari@gmail.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

Signed-off-by: NBen Gamari <bgamari@gmail.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

Signed-off-by: NEric Anholt <eric@anholt.net>
Reviewed-by: NKeith Packard <keithp@keithp.com>

This introduces allocation in the batch submission path that wasn't there
previously, but these are compatibility paths so we care about simplicity
more than performance.

kernel.org bug #12419.
Signed-off-by: NEric Anholt <eric@anholt.net>
Reviewed-by: NKeith Packard <keithp@keithp.com>
Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Signed-off-by: NEric Anholt <eric@anholt.net>
Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Like the GTT pwrite path fix, this uses an optimistic path and a
fallback to get_user_pages.  Note that this means we have to stop using
vfs_write and roll it ourselves.
Signed-off-by: NEric Anholt <eric@anholt.net>
Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>

We've wanted this for a few consumers that touch the pages directly (such as
the following commit), which have been doing the refcounting outside of
get/put pages.
Signed-off-by: NEric Anholt <eric@anholt.net>
Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Since the pagefault path determines that the lock order we use has to be
mmap_sem -> struct_mutex, we can't allow page faults to occur while the
struct_mutex is held.  To fix this in pwrite, we first try optimistically to
see if we can copy from user without faulting.  If it fails, fall back to
using get_user_pages to pin the user's memory, and map those pages
atomically when copying it to the GPU.
Signed-off-by: NEric Anholt <eric@anholt.net>
Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>

This fixes incorrect detection of the second SDVO/HDMI output on G4X, and
extra boot time on pre-G4X.
Signed-off-by: NKristian Høgsberg <krh@redhat.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

This improves the PLL timings according to the suggestion of the hardware
engineers.  This results in some outputs being able to sync that weren't
able to before.

This is part of fixing fd.o bug #17508.
Signed-off-by: NMa Ling <ling.ma@intel.com>
[anholt: cleaned up a couple of redundant comments]
Signed-off-by: NEric Anholt <eric@anholt.net>

The values come from the internal reference spreadsheet on PLL
timing limits for the G4X chipsets.

Part of fixing fd.o bug #17508
Signed-off-by: NMa Ling <ling.ma@intel.com>
[anholt: Cleaned up some whitespace]
Signed-off-by: NEric Anholt <eric@anholt.net>

Later spec investigation has revealed that every 9xx mobile part has
had this register in this format.  Also, no non-mobile parts have been shown
to have this register.  So make all mobile use the same code, and all
non-mobile use the hack 965 detection.
Signed-off-by: NEric Anholt <eric@anholt.net>

agp_chipset_flush() is for flushing the intel GMCH write cache via the
IFP, these two uses are for when we're getting the object into the cpu
READ domain, and thus should not be needed. This confused me when I was
getting my head around the code.

With thanks to airlied for helping me check my mental picture of how the
flushes and clflushes are supposed to be used.
Signed-off-by: NOwain G. Ainsworth <oga@openbsd.org>
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This was inspired by a patch by Chris Wilson, though none of it applied in any
way due to the debugfs work and I decided to change the formatting of the
new information anyway.
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Here we eliminate a few functions in favor of using a single function
to dump from all of the object lists.
Signed-Off-By: NBen Gamari <bgamari@gmail.com>
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The old mechanism to formatting proc files is extremely ugly. The
seq_file API was designed specifically for cases like this and greatly
simplifies the process.

Also, most of the files in /proc really don't belong there. This patch
introduces the infrastructure for putting these into debugfs and exposes
all of the proc files in debugfs as well.

This contains the i915 hooks rewrite as well, to make bisectability better.
Signed-off-by: NBen Gamari <bgamari@gmail.com>
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Under kernel modesetting, we manage the device at all times, regardless
of VT switching and X servers, so the only decent thing to do is to
claim the PCI device.  In that case, we call the suspend/resume hooks
directly from the pci driver hooks instead of the current class device detour.
Signed-off-by: NKristian Høgsberg <krh@redhat.com>
Signed-off-by: NDave Airlie <airlied@linux.ie>

Once upon a time, the DRM made the distinction between the drm_map
data structure exchanged with user space and the drm_local_map used
in the kernel.

For some reasons, while the BSD port still has that "feature", the
linux part abused drm_map for kernel internal usage as the local
map only existed as a typedef of the struct drm_map.

This patch fixes it by declaring struct drm_local_map separately
(though its content is currently identical to the userspace variant),
and changing the kernel code to only use that, except when it's a
user<->kernel interface (ie. ioctl).

This allows subsequent changes to the in-kernel format

I've also replaced the use of drm_local_map_t with struct drm_local_map
in a couple of places. Mostly by accident but they are the same (the
former is a typedef of the later) and I have some remote plans and
half finished patch to completely kill the drm_local_map_t typedef
so I left those bits in.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NDave Airlie <airlied@linux.ie>

The DRM uses its own wrappers to obtain resources from PCI devices,
which currently convert the resource_size_t into an unsigned long.

This is broken on 32-bit platforms with >32-bit physical address
space.

This fixes them, along with a few occurences of unsigned long used
to store such a resource in drivers.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NDave Airlie <airlied@linux.ie>

The last 8 fence registers sit at a different offset, so when we went to set
fence number 8 in the lower offset, we instead set PGETBL_CTL, and the GPU
got all sorts of angry at us.

fd.o bug #20567.  Easily reproducible by running glxgears and killing it about
6 times.
Signed-off-by: NEric Anholt <eric@anholt.net>

The i915 also uses the fence registers for GPU access to tiled buffers so
we cannot reallocate one whilst it is on the active list. By performing a
LRU scan of the fenced buffers we also avoid waiting the possibility of
waiting on a pinned, or otherwise unusable, buffer.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NEric Anholt <eric@anholt.net>

We need to check and report if there are no available fences - or else we
spin endlessly waiting for a buffer to magically unpin itself.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NEric Anholt <eric@anholt.net>

As we may steal the fence register of an unpinned buffer for another,
every time we repin the buffer we need to recheck whether it needs to be
allocated a fence.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NEric Anholt <eric@anholt.net>

If we wait upon a request and successfully unbind a buffer occupying a
fence register, then that slot will be freed and cause a NULL derefrence
upon rescanning.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NEric Anholt <eric@anholt.net>

Signed-off-by: NEric Anholt <eric@anholt.net>