- 24 8月, 2016 1 次提交
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由 Thierry Reding 提交于
The MIPI DSI output on Tegra SoCs requires some external logic to calibrate the MIPI pads before a video signal can be transmitted. This MIPI calibration logic requires to be powered on while the MIPI pads are being used, which is currently done as part of the DSI driver's probe implementation. This is suboptimal because it will leave the MIPI calibration logic powered up even if the DSI output is never used. On Tegra114 and earlier this behaviour also causes the driver to hang while trying to power up the MIPI calibration logic because the power partition that contains the MIPI calibration logic will be powered on by the display controller at output pipeline configuration time. Thus the power up sequence for the MIPI calibration logic happens before it's power partition is guaranteed to be enabled. Fix this by splitting up the API into a request/free pair of functions that manage the runtime dependency between the DSI and the calibration modules (no registers are accessed) and a set of enable, calibrate and disable functions that program the MIPI calibration logic at points in time where the power partition is really enabled. While at it, make sure that the runtime power management also works in ganged mode, which is currently also broken. Reported-by: NJonathan Hunter <jonathanh@nvidia.com> Tested-by: NJonathan Hunter <jonathanh@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 23 6月, 2016 11 次提交
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由 Thierry Reding 提交于
The local 'val' variable is used to store a value and immediately return it to its caller, and hence serves no purpose. Just drop it and directly return the value. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
This array never needs to be modified and therefore can be read-only data. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
There's no need to wrap the BIT() macro into an extra set of parentheses because it's already implemented to use its own set. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Insert a number of blank lines in places where they increase readability of the code. Also collapse various variable declarations to shorten some functions and finally rewrite some code for readability. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Fix a couple of occurrences where no blank line was used to separate variable declarations from code or where block comments were wrongly formatted. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Use kcalloc() to allocate arrays rather than passing the product of the size per element by the number of elements to kzalloc(). Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
The local 'pos' variable doesn't serve any purpose other than being a shortcut for pb->pos, but the result doesn't remove much, so simply drop the local variable. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
find_first_zero_bit() returns an unsigned long, so make the local variable that stores the result the same type for consistency. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
IDs can never be negative so use unsigned int. In some instances an explicitly sized type (such as u32) was used for no particular reason, so turn those into unsigned int as well for consistency. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
The number of channels, syncpoints, bases and mlocks can never be negative, so use unsigned int instead of int. Also make loop variables the same type for consistency. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Bhaktipriya Shridhar 提交于
System workqueues have been able to handle high level of concurrency for a long time now and there's no reason to use dedicated workqueues just to gain concurrency. Since the workqueue host->intr_wq is involved in sync point interrupts, and sync point wait and is not being used on a memory reclaim path, dedicated host->intr_wq has been replaced with the use of system_wq. Unlike a dedicated per-cpu workqueue created with create_workqueue(), system_wq allows multiple work items to overlap executions even on the same CPU; however, a per-cpu workqueue doesn't have any CPU locality or global ordering guarantees unless the target CPU is explicitly specified and thus the increase of local concurrency shouldn't make any difference. cancel_work_sync() has been used in _host1x_free_syncpt_irq() to ensure that no work is pending by the time exit path runs. Signed-off-by: NBhaktipriya Shridhar <bhaktipriya96@gmail.com> Acked-by: NTejun Heo <tj@kernel.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 28 5月, 2016 1 次提交
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由 Arnd Bergmann 提交于
Most users of IS_ERR_VALUE() in the kernel are wrong, as they pass an 'int' into a function that takes an 'unsigned long' argument. This happens to work because the type is sign-extended on 64-bit architectures before it gets converted into an unsigned type. However, anything that passes an 'unsigned short' or 'unsigned int' argument into IS_ERR_VALUE() is guaranteed to be broken, as are 8-bit integers and types that are wider than 'unsigned long'. Andrzej Hajda has already fixed a lot of the worst abusers that were causing actual bugs, but it would be nice to prevent any users that are not passing 'unsigned long' arguments. This patch changes all users of IS_ERR_VALUE() that I could find on 32-bit ARM randconfig builds and x86 allmodconfig. For the moment, this doesn't change the definition of IS_ERR_VALUE() because there are probably still architecture specific users elsewhere. Almost all the warnings I got are for files that are better off using 'if (err)' or 'if (err < 0)'. The only legitimate user I could find that we get a warning for is the (32-bit only) freescale fman driver, so I did not remove the IS_ERR_VALUE() there but changed the type to 'unsigned long'. For 9pfs, I just worked around one user whose calling conventions are so obscure that I did not dare change the behavior. I was using this definition for testing: #define IS_ERR_VALUE(x) ((unsigned long*)NULL == (typeof (x)*)NULL && \ unlikely((unsigned long long)(x) >= (unsigned long long)(typeof(x))-MAX_ERRNO)) which ends up making all 16-bit or wider types work correctly with the most plausible interpretation of what IS_ERR_VALUE() was supposed to return according to its users, but also causes a compile-time warning for any users that do not pass an 'unsigned long' argument. I suggested this approach earlier this year, but back then we ended up deciding to just fix the users that are obviously broken. After the initial warning that caused me to get involved in the discussion (fs/gfs2/dir.c) showed up again in the mainline kernel, Linus asked me to send the whole thing again. [ Updated the 9p parts as per Al Viro - Linus ] Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Andrzej Hajda <a.hajda@samsung.com> Cc: Andrew Morton <akpm@linux-foundation.org> Link: https://lkml.org/lkml/2016/1/7/363 Link: https://lkml.org/lkml/2016/5/27/486 Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> # For nvmem part Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 16 3月, 2016 2 次提交
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由 Markus Elfring 提交于
The return type "unsigned int" was used by the do_relocs() function despite the fact that it will eventually return a negative error code. Use a signed integer instead to accomodate for error codes. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Amitoj Kaur Chawla 提交于
for_each_child_of_node() performs an of_node_get() on each iteration, so to break out of the loop an of_node_put() is required. Found using Coccinelle. The semantic patch used for this is as follows: // <smpl> @@ expression e; local idexpression n; @@ for_each_child_of_node(..., n) { ... when != of_node_put(n) when != e = n ( return n; | + of_node_put(n); ? return ...; ) ... } // </smpl> Signed-off-by: NAmitoj Kaur Chawla <amitoj1606@gmail.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 09 3月, 2016 1 次提交
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由 Luis R. Rodriguez 提交于
Rename dma_*_writecombine() to dma_*_wc(), so that the naming is coherent across the various write-combining APIs. Keep the old names for compatibility for a while, these can be removed at a later time. A guard is left to enable backporting of the rename, and later remove of the old mapping defines seemlessly. Build tested successfully with allmodconfig. The following Coccinelle SmPL patch was used for this simple transformation: @ rename_dma_alloc_writecombine @ expression dev, size, dma_addr, gfp; @@ -dma_alloc_writecombine(dev, size, dma_addr, gfp) +dma_alloc_wc(dev, size, dma_addr, gfp) @ rename_dma_free_writecombine @ expression dev, size, cpu_addr, dma_addr; @@ -dma_free_writecombine(dev, size, cpu_addr, dma_addr) +dma_free_wc(dev, size, cpu_addr, dma_addr) @ rename_dma_mmap_writecombine @ expression dev, vma, cpu_addr, dma_addr, size; @@ -dma_mmap_writecombine(dev, vma, cpu_addr, dma_addr, size) +dma_mmap_wc(dev, vma, cpu_addr, dma_addr, size) We also keep the old names as compatibility helpers, and guard against their definition to make backporting easier. Generated-by: Coccinelle SmPL Suggested-by: NIngo Molnar <mingo@kernel.org> Signed-off-by: NLuis R. Rodriguez <mcgrof@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: airlied@linux.ie Cc: akpm@linux-foundation.org Cc: benh@kernel.crashing.org Cc: bhelgaas@google.com Cc: bp@suse.de Cc: dan.j.williams@intel.com Cc: daniel.vetter@ffwll.ch Cc: dhowells@redhat.com Cc: julia.lawall@lip6.fr Cc: konrad.wilk@oracle.com Cc: linux-fbdev@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: luto@amacapital.net Cc: mst@redhat.com Cc: tomi.valkeinen@ti.com Cc: toshi.kani@hp.com Cc: vinod.koul@intel.com Cc: xen-devel@lists.xensource.com Link: http://lkml.kernel.org/r/1453516462-4844-1-git-send-email-mcgrof@do-not-panic.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 04 3月, 2016 2 次提交
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由 Alexandre Courbot 提交于
Currently host1x-instanciated devices have their dma_ops left to NULL, which makes any DMA operation (like buffer import) on ARM64 fallback to the dummy_dma_ops and fail with an error. This patch calls of_dma_configure() with the host1x node when creating such a device, so the proper DMA operations are set. Suggested-by: NThierry Reding <thierry.reding@gmail.com> Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Alexandre Courbot 提交于
The default DMA mask covers a 32 bits address range, but host1x devices can address a larger range on TK1 and TX1. Set the DMA mask to the range addressable when we use the IOMMU to prevent the use of bounce buffers. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 14 12月, 2015 3 次提交
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由 Thierry Reding 提交于
The host1x unit found in Tegra210 SoCs is very similar to the unit in Tegra124, but it has 2 additional channels for a total of 14 channels. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
When unregistering a host1x driver, make sure to unregister the core driver as well to prevent it from sticking around and oppose reloading of the driver. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
These new helpers simplify implementing multi-driver modules and properly handle failure to register one driver by unregistering all previously registered drivers. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 02 10月, 2015 1 次提交
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由 Dmitry Osipenko 提交于
MLOCK's debug info, spewed on CDMA timeout, contains meaningless MLOCK owner channel ID because HOST1X_SYNC_MLOCK_OWNER_CHID_F() returns shifted value, while unshifted should be used. Fix it by changing '_F' to '_V'. Signed-off-by: NDmitry Osipenko <digetx@gmail.com> Reviewed-By: NTerje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 13 8月, 2015 7 次提交
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由 Thierry Reding 提交于
Keep track of the number of users of DSI and CSI pads and power down the regulators that supply the bricks when all users are gone. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Some changes are needed to the configuration settings for some lanes. In addition, the clock lanes for the CSI pads can no longer be calibrated. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
While Tegra132 has the same pads as Tegra124, some configuration values need to be programmed slightly differently. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
This table is never modified and can therefore reside in read-only memory. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Before starting a new calibration cycle, make sure to clear the current status by writing a 1 to the various "calibration done" bits. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Use more consistent names for the clock lane configuration registers and fix the offset of the upper clock lane configuration register for the first DSI pad. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Parameterize more of the register programming to accomodate for changes required by future SoC generations. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 03 4月, 2015 1 次提交
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由 Thierry Reding 提交于
This function is used to read the current value of the syncpt and is useful in situations where drivers don't schedule work and wait for the syncpoint to increment. One particular use-case is using the syncpoint as a VBLANK counter. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 27 1月, 2015 1 次提交
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由 Thierry Reding 提交于
Previously the struct bus_type exported by the host1x infrastructure was only a very basic skeleton. Turn that implementation into a more full- fledged bus to support proper probe ordering and power management. Note that the bus infrastructure needs to be available before any of the drivers can be registered. This is automatically ensured if all drivers are built as loadable modules (via symbol dependencies). If all drivers are built-in there are no such guarantees and the link order determines the initcall ordering. Adjust drivers/gpu/Makefile to make sure that the host1x bus infrastructure is initialized prior to any of its users (only drm/tegra currently). v2: Fix building host1x and tegra-drm as modules Reported-by: NDave Airlie <airlied@gmail.com> Reviewed-by: NSean Paul <seanpaul@chromium.org> Reviewed-by: NMark Zhang <markz@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 23 1月, 2015 3 次提交
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由 Thierry Reding 提交于
This function is needed in several places, so factor it out. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Instead of locking within host1x_device_add(), call it under the lock to make the locking more consistent. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
When a driver's ->probe() function fails, the host1x bus must not call its ->remove() function because the driver will already have cleaned up in the error handling path in ->probe(). Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 13 11月, 2014 6 次提交
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由 Sean Paul 提交于
During calibration, sets the "internal reference level for drive pull- down" to the value specified in the Tegra TRM. Signed-off-by: NSean Paul <seanpaul@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Sean Paul 提交于
Include the clock lanes when calibrating the MIPI PHY on Tegra124 compatible devices. Signed-off-by: NSean Paul <seanpaul@chromium.org> [treding@nvidia.com: bikeshedding] Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Sean Paul 提交于
By paving the CTRL reg value, the current code changes MIPI_CAL_PRESCALE ("Auto-cal calibration step prescale") from 1us to 0.1us (val=0). In the description for PHY's noise filter (MIPI_CAL_NOISE_FLT), the TRM states that if the value of the prescale is 0 (or 0.1us), the filter should be set between 2-5. However, the current code sets it to 0. For now, let's keep the prescale and filter values as-is, which is most likely the power-on-reset values of 0x2 and 0xa, respectively. Signed-off-by: NSean Paul <seanpaul@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
On 64-bit platforms an unsigned long would be 64 bit and cause unnecessary casting when being passed to writel() or returned from readl(). Make register values 32 bits wide to avoid that. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Use the u32 type for the offset in the host1x_job_gather structure for consistentcy with other structures. Negative offsets don't make sense in this context. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Consistently use a format of %pad+%#x to print address/offset in debug messages. Signed-off-by: NThierry Reding <treding@nvidia.com>
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