1. 06 6月, 2008 2 次提交
  2. 12 5月, 2008 1 次提交
  3. 29 4月, 2008 8 次提交
  4. 08 4月, 2008 1 次提交
  5. 01 4月, 2008 1 次提交
  6. 12 3月, 2008 2 次提交
  7. 20 2月, 2008 3 次提交
    • T
      [MIPS] SB1: Fix CONFIG_SIBYTE_DMA_PAGEOPS build failure. · 345599ab
      Thiemo Seufer 提交于
      Fix type mismatch warnings for 64-bit kernel builds which trigger -Werror.
      The problem affects only SB-1 kernels with CONFIG_SIBYTE_DMA_PAGEOPS
      enabled.
      Signed-off-by: NThiemo Seufer <ths@networkno.de>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      345599ab
    • R
      [MIPS] Fix buggy invocations of kmap_coherent() · 9a74b3eb
      Ralf Baechle 提交于
      kmap_coherent will only work correctly if the page it is called on is
      not marked dirty.  If it's dirty the kernel address of the page should
      be used instead of a temporary mapping.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      9a74b3eb
    • R
      [MIPS] Handle I-cache coherency in flush_cache_range() · 2eaa7ec2
      Ralf Baechle 提交于
      So far flush_cache_range() did't consider the I-cache largely because it
      did rarely ever matter to real world code.  This was working primarily
      because normally code and data are don't share the same pages - with the
      exception of MIPS16 code which uses address constants embedded between
      the code.   The following sequence of events may break the code:
      
       o MIPS16 executable being loaded
       o dynamic linker relocates the address constants embedded into the code:
       o   Uses mprotect(2) to make code pages PROT_READ|PROT_WRITE
       o   Performs the actual relocations by writing to the pages which likely
           are COW.  Because no PROT_EXEC is set I-cache coherence will not be
           considered.
       o   Uses mprotect(2) to switch code pages back to PROT_READ|PROT_EXEC.
           This results in a call to flush_cache_range() which also does not
           consider I-caches.
       o => executing the page just having been relocated may now result in the
         I-cache getting refilled with stale data from memory.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      2eaa7ec2
  8. 03 2月, 2008 1 次提交
  9. 01 2月, 2008 1 次提交
    • T
      [MIPS] Split the micro-assembler from tlbex.c. · e30ec452
      Thiemo Seufer 提交于
      This patch moves the micro-assembler in a separate implementation, as
      it is useful for further run-time optimizations. The only change in
      behaviour is cutting down printk noise at kernel startup time.
      
      Checkpatch complains about macro parameters which aren't protected by
      parentheses. I believe this is a flaw in checkpatch, the paste operator
      used in those macros won't work with parenthesised parameters.
      Signed-off-by: NThiemo Seufer <ths@networkno.de>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e30ec452
  10. 29 1月, 2008 11 次提交
  11. 12 1月, 2008 1 次提交
  12. 27 11月, 2007 1 次提交
    • R
      [MIPS] 64-bit Sibyte kernels need DMA32. · cce335ae
      Ralf Baechle 提交于
      Sibyte SOCs only have 32-bit PCI.  Due to the sparse use of the address
      space only the first 1GB of memory is mapped at physical addresses
      below 1GB.  If a system has more than 1GB of memory 32-bit DMA will
      not be able to reach all of it.
      
      For now this patch is good enough to keep Sibyte users happy but it seems
      eventually something like swiotlb will be needed for Sibyte.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      cce335ae
  13. 16 11月, 2007 3 次提交
  14. 30 10月, 2007 3 次提交
    • R
      [MIPS] MT: Fix bug in multithreaded kernels. · a76ab5c1
      Ralf Baechle 提交于
      When GDB writes a breakpoint into address area of inferior process the
      kernel needs to invalidate the modified memory in the inferior which
      is done by calling flush_cache_page which in turns calls
      r4k_flush_cache_page and local_r4k_flush_cache_page for VSMP or SMTC
      kernel via r4k_on_each_cpu().
      
      As the VSMP and SMTC SMP kernels for 34K are running on a single shared
      caches it is possible to get away without interprocessor function calls.
      This optimization is implemented in r4k_on_each_cpu, so
      local_r4k_flush_cache_page is only ever called on the local CPU.
      
      This is where the following code in local_r4k_flush_cache_page() strikes:
      
              /*
               * If ownes no valid ASID yet, cannot possibly have gotten
               * this page into the cache.
               */
              if (cpu_context(smp_processor_id(), mm) == 0)
                      return;
      
      On VSMP and SMTC had a function of cpu_context() for each CPU(TC).
      
      So in case another CPU than the CPU executing local_r4k_cache_flush_page
      has not accessed the mm but one of the other CPUs has there may be data
      to be flushed in the cache yet local_r4k_cache_flush_page will falsely
      return leaving the I-cache inconsistent for the breakpoint.
      
      While the issue was discovered with GDB it also exists in
      local_r4k_flush_cache_range() and local_r4k_flush_cache().
      
      Fixed by introducing a new function has_valid_asid which on MT kernels
      returns true if a mm is active on any processor in the system.
      
      This is relativly expensive since for memory acccesses in that loop
      cache misses have to be assumed but it seems the most viable solution
      for 2.6.23 and older -stable kernels.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      a76ab5c1
    • M
      [MIPS] c-r3k: Implement flush_cache_range() · 21b2aeca
      Maciej W. Rozycki 提交于
      Contrary to the belief of some, the R3000 and related processors did have
      caches, both a data and an instruction cache.  Here is an implementation
      of r3k_flush_cache_page(), which is the processor-specific back-end for
      flush_cache_range(), done according to the spec in
      Documentation/cachetlb.txt.
      
      While at it, remove an unused local function: get_phys_page(), do some
      trivial formatting fixes and modernise debugging facilities.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      21b2aeca
    • R
  15. 23 10月, 2007 1 次提交
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