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  1. 15 12月, 2009 4 次提交
  3. 09 12月, 2009 1 次提交
  5. 04 12月, 2009 3 次提交
  7. 30 11月, 2009 1 次提交
  9. 24 11月, 2009 3 次提交
    • P
      sh: Apply the sleazy FPU changes for SH-2A FPU as well. · 0f09e197
      由 Paul Mundt 提交于 
      This plugs in the fpu_counter manipulation for the SH-2A side also.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      0f09e197
    • S
      sh: Minor optimisations to FPU handling · d3ea9fa0
      由 Stuart Menefy 提交于 
      A number of small optimisations to FPU handling, in particular:

 - move the task USEDFPU flag from the thread_info flags field (which
   is accessed asynchronously to the thread) to a new status field,
   which is only accessed by the thread itself. This allows locking to
   be removed in most cases, or can be reduced to a preempt_lock().
   This mimics the i386 behaviour.

 - move the modification of regs->sr and thread_info->status flags out
   of save_fpu() to __unlazy_fpu(). This gives the compiler a better
   chance to optimise things, as well as making save_fpu() symmetrical
   with restore_fpu() and init_fpu().

 - implement prepare_to_copy(), so that when creating a thread, we can
   unlazy the FPU prior to copying the thread data structures.

Also make sure that the FPU is disabled while in the kernel, in
particular while booting, and for newly created kernel threads,

In a very artificial benchmark, the execution time for 2500000
context switches was reduced from 50 to 45 seconds.
Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      d3ea9fa0
    • G
      sh: add sleazy FPU optimization · a0458b07
      由 Giuseppe CAVALLARO 提交于 
      sh port of the sLeAZY-fpu feature currently implemented for some architectures
such us i386.

Right now the SH kernel has a 100% lazy fpu behaviour.
This is of course great for applications that have very sporadic or no FPU use.
However for very frequent FPU users...  you take an extra trap every context
switch.
The patch below adds a simple heuristic to this code: after 5 consecutive
context switches of FPU use, the lazy behavior is disabled and the context
gets restored every context switch.
After 256 switches, this is reset and the 100% lazy behavior is returned.

Tests with LMbench showed no regression.
I saw a little improvement due to the prefetching (~2%).

The tests below also show that, with this sLeazy patch, indeed,
the number of FPU exceptions is reduced.
To test this. I hacked the lat_ctx LMBench to use the FPU a little more.

   sLeasy implementation
   ===========================================
   switch_to calls            |  79326
   sleasy   calls             |  42577
   do_fpu_state_restore  calls|  59232
   restore_fpu   calls        |  59032

   Exceptions:  0x800 (FPU disabled  ): 16604

   100% Leazy (default implementation)
   ===========================================
   switch_to  calls            |  79690
   do_fpu_state_restore calls  |  53299
   restore_fpu  calls          |   53101

   Exceptions: 0x800 (FPU disabled  ):  53273
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NStuart Menefy <stuart.menefy@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      a0458b07
  11. 18 11月, 2009 1 次提交
  13. 12 11月, 2009 1 次提交
  15. 09 11月, 2009 1 次提交
  17. 05 11月, 2009 3 次提交
  19. 04 11月, 2009 1 次提交
  21. 30 10月, 2009 8 次提交
  23. 28 10月, 2009 1 次提交
    • P
      sh: perf events: Add preliminary support for SH-4A counters. · ac44e669
      由 Paul Mundt 提交于 
      This adds in preliminary support for the SH-4A performance counters.
Presently only the first 2 counters are supported, as these are the ones
of the most interest to the perf tool and end users. Counter chaining is
not presently handled, so these are simply implemented as 32-bit
counters.

This also establishes a perf event support framework for other hardware
counters, which the existing SH-4 oprofile code will migrate over to as
the SH-4A support evolves.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      ac44e669
  25. 18 10月, 2009 1 次提交
    • P
      sh: Disable SCIF2 on the SH-X3 proto CPU. · 15dfdddb
      由 Paul Mundt 提交于 
      SCIF2 and the FPU exceptions happen to share vector numbers, one in
EXPEVT and the other in INTEVT. This is a violation of the interface and
should have never made it in to silicon. On top of that, the demux hack
that was added for special dispatch is rather error prone, and introduces
more problems than it solves. Kill all of it off, and just refuse to deal
with SCIF2 outright.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      15dfdddb
  27. 16 10月, 2009 2 次提交
    • P
      sh: Kill off legacy UBC wakeup cruft. · cae19b59
      由 Paul Mundt 提交于 
      This code was added for some ancient SH-4 solution engines with peculiar
boot ROMs that did silly things to the UBC MSTP bits. None of these have
been in the wild for years, and these days the clock framework wraps up
the MSTP bits, meaning that the UBC code is one of the few interfaces
that is stomping MSTP bits underneath the clock framework. At this point
the risks far outweigh any benefit this code provided, so just kill it
off.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      cae19b59
    • P
      sh: Force boot CPU in to light sleep mode for SH-X3 SMP. · 94eab0bb
      由 Paul Mundt 提交于 
      All of the secondary CPUs are forced in to light sleep mode, but we were
missing the same initialization for the boot CPU. This resulted in
inconsistent sleep modes depending on which CPU we were on, confusing the
idle loop when not polling.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      94eab0bb
  29. 14 10月, 2009 1 次提交
    • P
      sh: TS_RESTORE_SIGMASK conversion. · 56bfc42f
      由 Paul Mundt 提交于 
      Replace TIF_RESTORE_SIGMASK with TS_RESTORE_SIGMASK and define our own
set_restore_sigmask() function.  This saves the costly SMP-safe set_bit
operation, which we do not need for the sigmask flag since TIF_SIGPENDING
always has to be set too.

Based on the x86 and powerpc change.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      56bfc42f
  31. 10 10月, 2009 1 次提交
  33. 28 9月, 2009 1 次提交
  35. 25 9月, 2009 2 次提交
  37. 14 9月, 2009 2 次提交
  39. 01 9月, 2009 2 次提交
    • P
      sh: Kill off kgdb's magical NMI debouncing. · ade315d8
      由 Paul Mundt 提交于 
      The kgdb stub has traditionally tied in to the NMI slot, and manually
handled debounce. Now that we have a generic way to do this instead, all
of the stub-specific debounce silliness can be killed off.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      ade315d8
    • P
      sh: nmi_debug support. · 1e1030dc
      由 Paul Mundt 提交于 
      This implements support for NMI debugging that was shamelessly copied
from the avr32 port. A bit of special magic is needed in the interrupt
exception path given that the NMI exception handler is stubbed in to the
regular exception handling table despite being reported in INTEVT. So we
mangle the lookup and kick off an EXPEVT-style exception dispatch from
the INTEVT path for exceptions that do_IRQ() has no chance of handling.
As a result, we also drop the evt2irq() conversion from the do_IRQ() path
and just do it in assembly.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      1e1030dc