1. 26 5月, 2014 2 次提交
  2. 22 5月, 2014 3 次提交
    • R
      ARM: stacktrace: include exception PC value in stacktrace output · 07b40341
      Russell King 提交于
      When we unwind through an exception stack, include the saved PC value
      into the stack trace: this fills in an otherwise missed functions from
      the trace (as indicated below):
      
       [<c03f4424>] fec_enet_interrupt+0xa0/0xe8
       [<c0066c0c>] handle_irq_event_percpu+0x68/0x228
       [<c0066e18>] handle_irq_event+0x4c/0x6c
       [<c006a024>] handle_fasteoi_irq+0xac/0x198
       [<c00664b0>] generic_handle_irq+0x4c/0x60
       [<c000f014>] handle_IRQ+0x40/0x98
       [<c0008554>] gic_handle_irq+0x30/0x64
       [<c0012900>] __irq_svc+0x40/0x50
       [<c0029030>] __do_softirq+0xe0/0x2fc		<====
       [<c0029500>] irq_exit+0xb0/0x100
       [<c000f018>] handle_IRQ+0x44/0x98
       [<c0008554>] gic_handle_irq+0x30/0x64
       [<c0012900>] __irq_svc+0x40/0x50
       [<c000f34c>] arch_cpu_idle+0x30/0x38		<====
       [<c005e1e4>] cpu_startup_entry+0xac/0x214
       [<c066297c>] rest_init+0x68/0x80
       [<c08ccb10>] start_kernel+0x2fc/0x358
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      07b40341
    • R
      ARM: stacktrace: avoid listing stacktrace functions in stacktrace · 3683f44c
      Russell King 提交于
      While debugging the FEC ethernet driver using stacktrace, it was noticed
      that the stacktraces always begin as follows:
      
       [<c00117b4>] save_stack_trace_tsk+0x0/0x98
       [<c0011870>] save_stack_trace+0x24/0x28
       ...
      
      This is because the stack trace code includes the stack frames for itself.
      This is incorrect behaviour, and also leads to "skip" doing the wrong
      thing (which is the number of stack frames to avoid recording.)
      
      Perversely, it does the right thing when passed a non-current thread.  Fix
      this by ensuring that we have a known constant number of frames above the
      main stack trace function, and always skip these.
      
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      3683f44c
    • R
      ARM: dma-mapping: avoid calling dma_cache_maint_page() on dev=>cpu · deace4a6
      Russell King 提交于
      Avoid calling dma_cache_maint_page() when unmapping a DMA_TO_DEVICE
      buffer.  The L1 cache ops never do anything in this circumstance, nor
      do they ever need to - all that matters for this case is that the data
      written is visible to the device before DMA starts.  What happens during
      the transfer (provided the buffer is not written to) is of no real
      consequence.
      
      We already do this optimisation for the L2 cache.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      deace4a6
  3. 25 4月, 2014 4 次提交
    • J
      ARM: 8037/1: mm: support big-endian page tables · 86f40622
      Jianguo Wu 提交于
      When enable LPAE and big-endian in a hisilicon board, while specify
      mem=384M mem=512M@7680M, will get bad page state:
      
      Freeing unused kernel memory: 180K (c0466000 - c0493000)
      BUG: Bad page state in process init  pfn:fa442
      page:c7749840 count:0 mapcount:-1 mapping:  (null) index:0x0
      page flags: 0x40000400(reserved)
      Modules linked in:
      CPU: 0 PID: 1 Comm: init Not tainted 3.10.27+ #66
      [<c000f5f0>] (unwind_backtrace+0x0/0x11c) from [<c000cbc4>] (show_stack+0x10/0x14)
      [<c000cbc4>] (show_stack+0x10/0x14) from [<c009e448>] (bad_page+0xd4/0x104)
      [<c009e448>] (bad_page+0xd4/0x104) from [<c009e520>] (free_pages_prepare+0xa8/0x14c)
      [<c009e520>] (free_pages_prepare+0xa8/0x14c) from [<c009f8ec>] (free_hot_cold_page+0x18/0xf0)
      [<c009f8ec>] (free_hot_cold_page+0x18/0xf0) from [<c00b5444>] (handle_pte_fault+0xcf4/0xdc8)
      [<c00b5444>] (handle_pte_fault+0xcf4/0xdc8) from [<c00b6458>] (handle_mm_fault+0xf4/0x120)
      [<c00b6458>] (handle_mm_fault+0xf4/0x120) from [<c0013754>] (do_page_fault+0xfc/0x354)
      [<c0013754>] (do_page_fault+0xfc/0x354) from [<c0008400>] (do_DataAbort+0x2c/0x90)
      [<c0008400>] (do_DataAbort+0x2c/0x90) from [<c0008fb4>] (__dabt_usr+0x34/0x40)
      
      The bad pfn:fa442 is not system memory(mem=384M mem=512M@7680M), after debugging,
      I find in page fault handler, will get wrong pfn from pte just after set pte,
      as follow:
      do_anonymous_page()
      {
      	...
      	set_pte_at(mm, address, page_table, entry);
      
      	//debug code
      	pfn = pte_pfn(entry);
      	pr_info("pfn:0x%lx, pte:0x%llxn", pfn, pte_val(entry));
      
      	//read out the pte just set
      	new_pte = pte_offset_map(pmd, address);
      	new_pfn = pte_pfn(*new_pte);
      	pr_info("new pfn:0x%lx, new pte:0x%llxn", pfn, pte_val(entry));
      	...
      }
      
      pfn:   0x1fa4f5,     pte:0xc00001fa4f575f
      new_pfn:0xfa4f5, new_pte:0xc00000fa4f5f5f	//new pfn/pte is wrong.
      
      The bug is happened in cpu_v7_set_pte_ext(ptep, pte):
      An LPAE PTE is a 64bit quantity, passed to cpu_v7_set_pte_ext in the r2 and r3 registers.
      On an LE kernel, r2 contains the LSB of the PTE, and r3 the MSB.
      On a BE kernel, the assignment is reversed.
      
      Unfortunately, the current code always assumes the LE case,
      leading to corruption of the PTE when clearing/setting bits.
      
      This patch fixes this issue much like it has been done already in the
      cpu_v7_switch_mm case.
      
      CC stable <stable@vger.kernel.org>
      Signed-off-by: NJianguo Wu <wujianguo@huawei.com>
      Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
      Acked-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      86f40622
    • C
      ARM: 8036/1: Enable IRQs before attempting to read user space in __und_usr · 1417a6b8
      Catalin Marinas 提交于
      The Undef abort handler in the kernel reads the undefined instruction
      from user space. If the page table was modified from another CPU, the
      user access could fail and do_page_fault() will be executed with
      interrupts disabled. This can potentially deadlock on ARM11MPCore or on
      Cortex-A15 with erratum 798181 workaround enabled (both implying IPI for
      TLB maintenance with page table lock held).
      
      This patch enables the IRQs in __und_usr before attempting to read the
      instruction from user space.
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      Tested-by: NArun KS <getarunks@gmail.com>
      Cc: Hartley Sweeten <hsweeten@visionengravers.com>
      Cc: Ryan Mallon <rmallon@gmail.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      1417a6b8
    • C
      ARM: 8035/1: Disable preemption in crunch_task_enable() · bc94081c
      Catalin Marinas 提交于
      This patch is in preparation for calling the crunch_task_enable()
      function with interrupts enabled.
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      Cc: Hartley Sweeten <hsweeten@visionengravers.com>
      Cc: Ryan Mallon <rmallon@gmail.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      bc94081c
    • C
      ARM: 8034/1: Disable preemption in iwmmxt_task_enable() · 431a84b1
      Catalin Marinas 提交于
      This patch is in preparation for calling the iwmmxt_task_enable()
      function with interrupts enabled.
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      431a84b1
  4. 23 4月, 2014 6 次提交
  5. 15 4月, 2014 1 次提交
  6. 13 4月, 2014 1 次提交
  7. 12 4月, 2014 11 次提交
  8. 11 4月, 2014 9 次提交
  9. 10 4月, 2014 1 次提交
  10. 09 4月, 2014 2 次提交