1. 10 2月, 2016 1 次提交
  2. 17 12月, 2015 1 次提交
  3. 21 10月, 2015 4 次提交
  4. 30 7月, 2015 1 次提交
  5. 21 7月, 2015 2 次提交
  6. 22 5月, 2015 1 次提交
  7. 13 5月, 2015 2 次提交
  8. 24 3月, 2015 3 次提交
  9. 17 3月, 2015 9 次提交
  10. 23 1月, 2015 1 次提交
    • G
      powerpc/eeh: Fix missed PE#0 on P7IOC · 2aa5cf9e
      Gavin Shan 提交于
      PE#0 should be regarded as valid for P7IOC, while it's invalid for
      PHB3. The patch adds flag EEH_VALID_PE_ZERO to differentiate those
      two cases. Without the patch, we possibly see frozen PE#0 state is
      cleared without EEH recovery taken on P7IOC as following kernel logs
      indicate:
      
      [root@ltcfbl8eb ~]# dmesg
             :
      pci 0000:00     : [PE# 000] Secondary bus 0 associated with PE#0
      pci 0000:01     : [PE# 001] Secondary bus 1 associated with PE#1
      pci 0001:00     : [PE# 000] Secondary bus 0 associated with PE#0
      pci 0001:01     : [PE# 001] Secondary bus 1 associated with PE#1
      pci 0002:00     : [PE# 000] Secondary bus 0 associated with PE#0
      pci 0002:01     : [PE# 001] Secondary bus 1 associated with PE#1
      pci 0003:00     : [PE# 000] Secondary bus 0 associated with PE#0
      pci 0003:01     : [PE# 001] Secondary bus 1 associated with PE#1
      pci 0003:20     : [PE# 002] Secondary bus 32..63 associated with PE#2
             :
      EEH: Clear non-existing PHB#3-PE#0
      EEH: PHB location: U78AE.001.WZS00M9-P1-002
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      2aa5cf9e
  11. 15 10月, 2014 3 次提交
    • G
      powerpc/eeh: Block CFG upon frozen Shiner adapter · 179ea48b
      Gavin Shan 提交于
      The Broadcom Shiner 2-ports 10G ethernet adapter has same problem
      commit 6f20bda0 ("powerpc/eeh: Block PCI config access upon frozen
      PE") fixes. Put it to the black list as well.
      
         # lspci -s 0004:01:00.0
         0004:01:00.0 Ethernet controller: Broadcom Corporation \
                      NetXtreme II BCM57810 10 Gigabit Ethernet (rev 10)
         # lspci -n -s 0004:01:00.0
         0004:01:00.0 0200: 14e4:168e (rev 10)
      Reported-by: NJohn Walthour <jwalthour@us.ibm.com>
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      179ea48b
    • G
      powerpc/eeh: Block PCI config access upon frozen PE · b6541db1
      Gavin Shan 提交于
      The problem was found when I tried to inject PCI config error by
      PHB3 PAPR error injection registers into Broadcom Austin 4-ports
      NIC adapter. The frozen PE was reported successfully and EEH core
      started to recover it. However, I run into fenced PHB when dumping
      PCI config space as EEH logs. I was told that PCI config requests
      should not be progagated to the adapter until PE reset is done
      successfully. Otherise, we would run out of PHB internal credits
      and trigger PCT (PCIE Completion Timeout), which leads to the
      fenced PHB.
      
      The patch introduces another PE flag EEH_PE_CFG_RESTRICTED, which
      is set during PE initialization time if the PE includes the specific
      PCI devices that need block PCI config access until PE reset is done.
      When the PE becomes frozen for the first time, EEH_PE_CFG_BLOCKED is
      set if the PE has flag EEH_PE_CFG_RESTRICTED. Then the PCI config
      access to the PE will be dropped by platform PCI accessors until
      PE reset is done successfully. The mechanism is shared by PowerNV
      platform owned PE or userland owned ones. It's not used on pSeries
      platform yet.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      b6541db1
    • G
      powerpc/powernv: Drop config requests in EEH accessors · d2cfbcd7
      Gavin Shan 提交于
      It's bad idea to access the PCI config registers of the adapters,
      which is experiencing reset. It leads to recursive EEH error without
      exception. The patch drops PCI config requests in EEH accessors if
      the PE has been marked to accept PCI config requests, for example
      during PE reseet time.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      d2cfbcd7
  12. 30 9月, 2014 1 次提交
  13. 05 8月, 2014 5 次提交
  14. 28 7月, 2014 1 次提交
  15. 28 4月, 2014 1 次提交
  16. 17 2月, 2014 1 次提交
  17. 15 1月, 2014 2 次提交
  18. 11 10月, 2013 1 次提交