The patch replaces private enum clock IDs in the driver with macros provided
by the DT header.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NTomasz Figa <t.figa@samsung.com>

Fixes cpll control and lock register offset values for Exynos5420 SoC.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

dout_pixel is a new ID allocated for pixel clock divider. It is
queried in the driver to pass as the parent to hdmi clock while
switching between parents.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

hdmi driver needs to change the parent of hdmi clock
to pixel clock or hdmiphy clock, based on the stability
of hdmiphy. This patch is exposing the mux for changing
the parent.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Listing sclk_hdmiphy at 0th position in the list of parents is
causing wrong configuration in reg SRC_DISP10.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Adding sysmmu clock for mixer for exynos5420.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Add sclk_hdmiphy to the list of exposed clocks. This is required
by hdmi driver to change the parent of hdmi clock.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

'exynos5420_plls' is used only in this file. Make is static.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch defines a common rate_table which will contain recommended p, m, s,
k values for supported rates that needs to be changed for changing
corresponding PLL's rate.
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NYadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch migrates exynos5420 pll registeration to use common
samsung_clk_register_pll() by intialising table of PLLs and adding PLLs to
unique id list of clocks.
Signed-off-by: NYadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: NVikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Symbols referenced only in this file are made static.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The EXYNOS5420 clocks are statically listed and registered using
the Samsung specific common clock helper functions.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>