MSM's memory is aligned to 2MB, which is more than we can do with our
existing method as we're limited to the upper 8 bits.  Extend this by
using two instructions to 16 bits, automatically selected when MSM is
enabled.
Acked-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This idea came from Nicolas, Eric Miao produced an initial version,
which was then rewritten into this.

Patch the physical to virtual translations at runtime.  As we modify
the code, this makes it incompatible with XIP kernels, but allows us
to achieve this with minimal loss of performance.

As many translations are of the form:

	physical = virtual + (PHYS_OFFSET - PAGE_OFFSET)
	virtual = physical - (PHYS_OFFSET - PAGE_OFFSET)

we generate an 'add' instruction for __virt_to_phys(), and a 'sub'
instruction for __phys_to_virt().  We calculate at run time (PHYS_OFFSET
- PAGE_OFFSET) by comparing the address prior to MMU initialization with
where it should be once the MMU has been initialized, and place this
constant into the above add/sub instructions.

Once we have (PHYS_OFFSET - PAGE_OFFSET), we can calculate the real
PHYS_OFFSET as PAGE_OFFSET is a build-time constant, and save this for
the C-mode PHYS_OFFSET variable definition to use.

At present, we are unable to support Realview with Sparsemem enabled
as this uses a complex mapping function, and MSM as this requires a
constant which will not fit in our math instruction.

Add a module version magic string for this feature to prevent
incompatible modules being loaded.
Tested-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

These are needed for CONFIG_ARM_PATCH_PHYS_VIRT to work.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

head.S makes use of PHYS_OFFSET.  When it becomes a variable, the
assembler won't understand this.  Compute PHYS_OFFSET by the following
method.  This code is linked at its virtual address, but run at before
the MMU is enabled, so at his physical address.

1:	.long	.
	.long	PAGE_OFFSET

	adr	r0, 1b		@ r0 = physical ','
	ldmia	r0, {r1, r2}	@ r1 = virtual '.', r2 = PAGE_OFFSET
	sub	r1, r0, r1	@ r1 = physical-virtual
	add	r2, r2, r1	@ r2 = PAGE_OFFSET + physical-virtual
				@    := PHYS_OFFSET.

Switch XIP users of PHYS_OFFSET to use PLAT_PHYS_OFFSET - we can't
use this method for XIP kernels as the code doesn't execute in RAM.
Tested-by: NTony Lindgren <tony@atomide.com>
Reviewed-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

As PHYS_OFFSET will be becoming a variable, we can't have it used in
initializers nor assembly code.  Replace those in generic code with
a run-time initialization.  Replace those in platform code using the
individual platform specific PLAT_PHYS_OFFSET.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This uncouple PHYS_OFFSET from the platform definitions, thereby
facilitating run-time computation of the physical memory offset.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NWan ZongShun <mcuos.com@gmail.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Acked-by: NJiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Since the debug macros no longer depend on the machine type information,
the machine type lookup can be deferred to setup_arch() in setup.c which
simplifies the code somewhat.

We also move the __error_a functionality into setup.c for displaying a
message when a bad machine ID is passed to the kernel via the LL debug
code.  We also log this into the kernel ring buffer which makes it
possible to retrieve the message via a debugger.

Original idea from Grant Likely.
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Allow non-ARM SMP processors to use the SMP_ON_UP feature.  CPUs
supporting SMP must have the new CPU ID format, so check for this first.
Then check for ARM11MPCore, which fails the MPIDR check.  Lastly check
the MPIDR reports multiprocessing extensions and that the CPU is part of
a multiprocessing system.

Cc: <stable@kernel.org>
Reported-and-Tested-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Ensure that the ISA/PCI IO space accessors are properly ordered on
ARMv6+ architectures.  These should always be ordered with respect to
all other accesses.

This also fixes __iormb() and __iowmb() not being visible to ioread/
iowrite if a platform defines its own MMIO accessors.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Disable the initrd if the passed address already overlaps the reserved
region.  This avoids oopses on Netwinders when NeTTrom tells the kernel
that an initrd is located at mem+4MB, but this overlaps the BSS,
resulting in the kernels in-use BSS being freed.

This should be applied to v2.6.37-stable.

Cc: <stable@kernel.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

0ea12930 (arm: return both physical and virtual addresses from addruart)
changed the way the 'addruart' worked, making it return both the virt
and phys addresses.  Unfortunately, for footbridge, these were reversed.
Fix that.  Tested on Netwinder.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This code elsewhere returns a negative constant to an indicate an error,
while IS_ERR returns the result of a >= operation.

The semantic patch that fixes this problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression x;
@@

 if (...) { ...
- return IS_ERR(x);
+ return PTR_ERR(x);
}
// </smpl>
Signed-off-by: NJulia Lawall <julia@diku.dk>
Acked-by: NJarkko Nikula <jhnikula@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit 8419fdba
(omap2+: Add omap_mux_get_by_name) introduced the following
compile warning:

arch/arm/mach-omap2/mux.c: In function '_omap_mux_get_by_name':
arch/arm/mach-omap2/mux.c:163:17: warning: 'found_mode' may be used
uninitialized in this function
Signed-off-by: NFelipe Balbi <balbi@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit 03a9e512
(omap1: Use asm_irq_flags for entry-macro.S) added support
for multi-omap builds with addition of the omap_irq_flags.

Commit 9f9605c2
(omap2+: Fix unused variable warning for omap_irq_base)
simplified omap2+ entry-macro.S by moving omap_irq_flags
out of entry-macro.S.

Simplify omap1 entry-macro.S in a similar way to keep the
code consistent. Based on a similar earlier patch for omap2+
by Russell King <rmk+kernel@arm.linux.org.uk>.
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit 5d190c40
(omap2+: Initialize omap_irq_base for entry-macro.S from
platform code) simplified the handling of omap_irq_base
for multi-omap builds. However, this patch also introduced
a build warning for !MULTI_OMAP2 builds:

arch/arm/mach-omap2/io.c: In function 'omap_irq_base_init':
arch/arm/mach-omap2/io.c:322: warning: unused variable 'omap_irq_base'

Fix this by removing the ifdef. Also simplify things further
by moving omap_irq_base out of entry-macro.S.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
[tony@atomide.com: updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Signed-off-by: NColin Cross <ccross@android.com>

A future patch will export gic_mask_irq and gic_unmask_irq.
Rename the pointers in arch/arm/mach-tegra/irq.c to avoid
a compile error.
Signed-off-by: NColin Cross <ccross@android.com>

Commit 37337a8d, "ARM: tegra: irq_data
conversion." missed changing one reference to 'irq' in the function
tegra_gpio_irq_set_type().  This patch fixes the build error.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NLennert Buytenhek <buytenh@secretlab.ca>
Acked-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NColin Cross <ccross@android.com>

The -rt patches change the console_semaphore to console_mutex.  As a
result, a quite large chunk of the patches changes all
acquire/release_console_sem() to acquire/release_console_mutex()

This commit makes things use more neutral function names which dont make
implications about the underlying lock.

The only real change is the return value of console_trylock which is
inverted from try_acquire_console_sem()

This patch also paves the way to switching console_sem from a semaphore to
a mutex.

[akpm@linux-foundation.org: coding-style fixes]
[akpm@linux-foundation.org: make console_trylock return 1 on success, per Geert]
Signed-off-by: NTorben Hohn <torbenh@gmx.de>
Cc: Thomas Gleixner <tglx@tglx.de>
Cc: Greg KH <gregkh@suse.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The EP93xx C and D GPIO ports are multiplexed with the Keypad Interface
peripheral.  At power-up they default into non-GPIO mode with the Key
Matrix controller enabled so these ports are unusable for GPIO.  Note
that the Keypad Interface peripheral is only available in the EP9307,
EP9312, and EP9315 processor variants.

The keypad support will clear the DeviceConfig bits appropriately to
enable the Keypad Interface when the driver is loaded.  And, when the
driver is unloaded it will set the bits to return the ports to GPIO mode.

To make these ports available for GPIO after power-up on all EP93xx
processor variants, set the KEYS and GONK bits in the DeviceConfig
register.

Similarly, the E, G, and H ports are multiplexed with the IDE Interface
peripheral.  At power-up these also default into non-GPIO mode.  Note
that the IDE peripheral is only available in the EP9312 and EP9315
processor variants.

Since an IDE driver is not even available in mainline, set the EONIDE,
GONIDE, and HONIDE bits in the DeviceConfig register so that these
ports will be available for GPIO use after power-up.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NRyan Mallon <ryan@bluewatersys.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Changing the virt_to_phys() argument to "const volatile void *" avoids
compiler warnings in some situations where this function is used.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Ensure that the twd timer reload value is reprogrammed each time we
enter periodic mode.  This ensures that the reload value is always
reset correctly.
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NColin Cross <ccross@android.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Timers on Versatile Express mainboard are used as system clock/event
sources. Driver assumes that they are clocked with 1MHz signal.
Old V2M firmware apparently configured it by default, but on newer
boards one can observe that "sleep 1" command takes over 30 seconds
to finish, as the timers are fed with 32kHz instead...

This patch performs required magic and also removes code clearing
timer's control registers, as exactly the same operations are
performed by the timer driver few jiffies later.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Tested-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Update the option text to those which appear on the front of the
appropriate board user guides.  This gives consistent board naming, and
makes it obvious which option is for which platform.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

As no one seems to really know which configuration options tie up with
which boards, I thought I'd do some investigation and try to work it
out.  After discussion with some folk in linaro, I think I have this
nailed.

The names are updated to use the name on the front of the appropriate
board user guide for the various baseboards, which I've taken to be
the official name for each board.

I haven't significantly updated the descriptions for the tiles as that
is even less clear - as far as I can see on ARMs website, there is no
Cortex-A9 tile for Realview EB - only ARM11MPCore, ARM1156T2F-S,
ARM1176TZF-S and Cortex-R4F.  So exactly what this 'Multicore Cortex-A9
Tile' is...
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Fix two section mismatch warnings in the platform SMP bringup code for
Realview and Versatile Express:

WARNING: arch/arm/mach-realview/built-in.o(.text+0x8ac): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release
The function write_pen_release() references
the variable __cpuinitdata pen_release.
This is often because write_pen_release lacks a __cpuinitdata
annotation or the annotation of pen_release is wrong.

WARNING: arch/arm/mach-vexpress/built-in.o(.text+0x7b4): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release
The function write_pen_release() references
the variable __cpuinitdata pen_release.
This is often because write_pen_release lacks a __cpuinitdata
annotation or the annotation of pen_release is wrong.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds support for the internal matrix keyboard controller for
Nvidia Tegra platforms.
Signed-off-by: NRakesh Iyer <riyer@nvidia.com>
Reviewed-by: NTrilok Soni <tsoni@codeaurora.org>
Signed-off-by: NDmitry Torokhov <dtor@mail.ru>

The meaning of CONFIG_EMBEDDED has long since been obsoleted; the option
is used to configure any non-standard kernel with a much larger scope than
only small devices.

This patch renames the option to CONFIG_EXPERT in init/Kconfig and fixes
references to the option throughout the kernel.  A new CONFIG_EMBEDDED
option is added that automatically selects CONFIG_EXPERT when enabled and
can be used in the future to isolate options that should only be
considered for embedded systems (RISC architectures, SLOB, etc).

Calling the option "EXPERT" more accurately represents its intention: only
expert users who understand the impact of the configuration changes they
are making should enable it.
Reviewed-by: NIngo Molnar <mingo@elte.hu>
Acked-by: NDavid Woodhouse <david.woodhouse@intel.com>
Signed-off-by: NDavid Rientjes <rientjes@google.com>
Cc: Greg KH <gregkh@suse.de>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Robin Holt <holt@sgi.com>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Add platform data for MIPI-DSI and LCDC on the AG5EVM
board. The sh73a0 clkdev bindings are also updated.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

PLL1 and PLL2 in the sh73a0 CPGA has a CFG bit that
must be taken into account to correctly calculate the
frequency.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

When clearing the DMA channel, clear all status bits.

When handling a DMA interrupt, clear only the interrupt
status bits that have been read and are passed to the
channel's interrupt handler, not every status bit.
Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NG, Manjunath Kondaiah <manjugk@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

gpio7 on the tps65930 is used as an output on the devkit8000 and
gpio1 is not connected. Remove gpio7 and change gpio1 to pulldown
Signed-off-by: NDaniel Morsing <daniel.morsing@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

offsets in the comment were wrong - fix this.
Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fix rtc gpios and mux
Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Earlier patches select HAVE_SCHED_CLOCK for omaps. To have working sched_clock
also for MPU timer, we need to implement it in a way where the right one gets
selected during the runtime.
Signed-off-by: NTony Lindgren <tony@atomide.com>

For omap15xx and 730 we need to use the MPU timer
as the 32K timer is not available. For omap16xx
we want to use the 32K timer because of PM. Fix this
by allowing to build in both timers.
Signed-off-by: NTony Lindgren <tony@atomide.com>

* Pins 2 and 4 of switch 33 are documented as don't care on the PCB,
  my testing seems to confirm this.

* I have been unable to do anything sensible with S1 set to on.
  Am I missing something with regards to MMC1?

* Clarify which driver is needed for each switch setting.

* Should the AP4 board code be updated to allow the
  SHDI driver to access SHDI1 as the mackerel code does?
Signed-off-by: NSimon Horman <horms@verge.net.au>
Acked-by: NYusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Otherwise systems using the MPU timer will hang.
Signed-off-by: NTony Lindgren <tony@atomide.com>

A few headers are included twice, remove them.

Found the following errors using make includecheck:
arch/arm/mach-omap2/clock44xx_data.c: prm44xx.h is
included more than once.
arch/arm/mach-omap2/clockdomains44xx_data.c: cm1_44xx.h
is included more than once.
arch/arm/mach-omap2/clockdomains44xx_data.c: cm2_44xx.h
is included more than once.
arch/arm/mach-omap2/powerdomain2xxx_3xxx.c: prm-regbits-34xx.h
is included more than once.

Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
[paul@pwsan.com: dropped lists from patch cc:s; tweaked subject line]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Commit 56a6a19d ("omap2plus: prm:
Trvial build break fix for undefined reference to
'omap2_prm_read_mod_reg'") generates a lot of warnings on boot since
clockdomain functions that manipulate wake-up dependencies are not
implemented yet on OMAP4 for 2.6.38.  This patch bypasses the OMAP2/3
functions on OMAP4, which in turn avoids the warnings when the
functions would attempt to call the underlying OMAP2/3 PRCM functions.
A one-line warning is still logged from the clockdomain code that the
OMAP4 wake-up dependency code is not yet implemented.

A clockdomain wake-up and sleep dependency implementation for OMAP4
from Rajendra should be possible to merge during the 2.6.39 merge
window:

    http://www.mail-archive.com/linux-omap@vger.kernel.org/msg41748.html

    http://www.mail-archive.com/linux-omap@vger.kernel.org/msg42222.htmlReported-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>