- 14 7月, 2013 11 次提交
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由 Christian König 提交于
Currently doesn't matter cause we allocate the fence in the lower 265MB anyway. Reported-by: NFrank Huang <FrankR.Huang@amd.com> Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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由 Alex Deucher 提交于
Helpful for debugging GPUVM errors as we can see what hw block and page generated the fault in the log. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Helpful for debugging GPUVM errors as we can see what hw block and page generated the fault in the log. v2: simplify fault decoding Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Alex Deucher 提交于
Helpful for debugging GPUVM errors as we can see what hw block and page generated the fault in the log. v2: simplify fault decoding Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Jerome Glisse 提交于
Avoid creating temporary platform device that will lead to issue when several radeon gpu are in same computer. Instead directly use the radeon device for requesting firmware. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maarten Lankhorst 提交于
Op 10-07-13 12:03, Markus Trippelsdorf schreef: > On 2013.07.10 at 11:56 +0200, Maarten Lankhorst wrote: >> Op 10-07-13 11:46, Markus Trippelsdorf schreef: >>> On 2013.07.10 at 11:29 +0200, Maarten Lankhorst wrote: >>>> Op 10-07-13 11:22, Markus Trippelsdorf schreef: >>>>> By simply copy/pasting a big document under LibreOffice my system hangs >>>>> itself up. Only a hard reset gets it working again. >>>>> see also: https://bugs.freedesktop.org/show_bug.cgi?id=66551 >>>>> >>>>> I've bisected the issue to: >>>>> >>>>> commit ecff665f >>>>> Author: Maarten Lankhorst <m.b.lankhorst@gmail.com> >>>>> Date: Thu Jun 27 13:48:17 2013 +0200 >>>>> >>>>> drm/ttm: make ttm reservation calls behave like reservation calls >>>>> >>>>> This commit converts the source of the val_seq counter to >>>>> the ww_mutex api. The reservation objects are converted later, >>>>> because there is still a lockdep splat in nouveau that has to >>>>> resolved first. >>>>> >>>>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> >>>>> Reviewed-by: Jerome Glisse <jglisse@redhat.com> >>>>> Signed-off-by: Dave Airlie <airlied@redhat.com> >>>> Hey, >>>> >>>> Can you try current head with CONFIG_PROVE_LOCKING set and post the >>>> lockdep splat from dmesg, if any? If there is any locking issue >>>> lockdep should warn about it. Lockdep will turn itself off after the >>>> first splat, so if the lockdep splat happens before running the >>>> affected parts those will have to be fixed first. >>> There was an unrelated EDAC lockdep splat, so I simply disabled it. > >>> This is what I get: >>> Jul 10 11:40:44 x4 kernel: ================================================ >>> Jul 10 11:40:44 x4 kernel: [ BUG: lock held when returning to user space! ] >>> Jul 10 11:40:44 x4 kernel: 3.10.0-08587-g496322bc #35 Not tainted >>> Jul 10 11:40:44 x4 kernel: ------------------------------------------------ >>> Jul 10 11:40:44 x4 kernel: X/211 is leaving the kernel with locks still held! >>> Jul 10 11:40:44 x4 kernel: 2 locks held by X/211: >>> Jul 10 11:40:44 x4 kernel: #0: (reservation_ww_class_acquire){+.+.+.}, at: [<ffffffff813279f0>] radeon_bo_list_validate+0x20/0xd0 >>> Jul 10 11:40:44 x4 kernel: #1: (reservation_ww_class_mutex){+.+.+.}, at: [<ffffffff81309306>] ttm_eu_reserve_buffers+0x126/0x4b0 >>> Jul 10 11:40:52 x4 kernel: SysRq : Emergency Sync >>> Jul 10 11:40:53 x4 kernel: Emergency Sync complete >>> >> Thanks, exactly what I thought. I missed a backoff somewhere.. >> >> Does the below patch fix it? > Yes. Thank you for your quick reply. 8<------ If radeon_cs_parser_relocs fails ttm_eu_backoff_reservation doesn't get called. This left open a bug where ttm_eu_reserve_buffers succeeded but the bo's were not unlocked afterwards: Jul 10 11:40:44 x4 kernel: ================================================ Jul 10 11:40:44 x4 kernel: [ BUG: lock held when returning to user space! ] Jul 10 11:40:44 x4 kernel: 3.10.0-08587-g496322bc #35 Not tainted Jul 10 11:40:44 x4 kernel: ------------------------------------------------ Jul 10 11:40:44 x4 kernel: X/211 is leaving the kernel with locks still held! Jul 10 11:40:44 x4 kernel: 2 locks held by X/211: Jul 10 11:40:44 x4 kernel: #0: (reservation_ww_class_acquire){+.+.+.}, at: [<ffffffff813279f0>] radeon_bo_list_validate+0x20/0xd0 Jul 10 11:40:44 x4 kernel: #1: (reservation_ww_class_mutex){+.+.+.}, at: [<ffffffff81309306>] ttm_eu_reserve_buffers+0x126/0x4b0 Jul 10 11:40:52 x4 kernel: SysRq : Emergency Sync Jul 10 11:40:53 x4 kernel: Emergency Sync complete This is a regression caused by commit ecff665f. "drm/ttm: make ttm reservation calls behave like reservation calls" Reported-by: NMarkus Trippelsdorf <markus@trippelsdorf.de> Tested-by: NMarkus Trippelsdorf <markus@trippelsdorf.de> Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Lighter weight than using the 3D engine. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Lighter weight than using the 3D engine. v2: fix ring count Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
They still seem to cause instability on some r6xx parts. As a follow up, we can switch to using CP DMA for bo moves on r6xx as a lighter weight alternative to using the 3D engine. A version of this patch should also go to stable kernels. Tested-by: NJ.N. <golden.fleeced@gmail.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Gfx PG doesn't seem to work properly when UVD is initialized on certain PALM boards. Disable gfx PG for now until we sort out a proper fix. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Prevents a segfault if an afmt block is not assigned to the encoder such as in the LVDS or eDP case. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=66714Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 09 7月, 2013 11 次提交
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git://people.freedesktop.org/~agd5f/linux由 Dave Airlie 提交于
A few more DPM fixes based on user testing. * 'drm-next-3.11' of git://people.freedesktop.org/~agd5f/linux: drm/radeon/dpm: implement vblank_too_short callback for si drm/radeon/dpm: implement vblank_too_short callback for cayman drm/radeon/dpm: implement vblank_too_short callback for btc drm/radeon/dpm: implement vblank_too_short callback for evergreen drm/radeon/dpm: implement vblank_too_short callback for 7xx drm/radeon/dpm: add checks against vblank time drm/radeon/dpm: add helper to calculate vblank time drm/radeon: remove stray line in old pm code drm/radeon/dpm: fix display_gap programming on rv7xx drm/radeon/dpm: implement force performance level for TN drm/radeon/dpm: implement force performance level for ON/LN drm/radeon/dpm: implement force performance level for SI drm/radeon/dpm: implement force performance level for cayman drm/radeon/dpm: implement force performance levels for 7xx/eg/btc drm/radeon/dpm: add infrastructure to force performance levels drm/radeon: fix surface setup on r1xx drm/radeon: add support for 3d perf states on older asics drm/radeon: set default clocks for SI when DPM is disabled
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由 Dave Airlie 提交于
Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next Two minor fixes for regressions. * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/nvc0/gr: fix gpc firmware regression drm/nouveau: fix minor thinko causing bo moves to not be async on kepler
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由 Alex Deucher 提交于
Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
If the vblank time is too short to adjust mclk, assume multiple displays (no mclk adjustments). Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Required for checking vblank time for mclk changes. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Looks like a remnant from an old rebase. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Check the driver state rather than the register as the crtc registers may not be enabled yet. Should fix: https://bugzilla.kernel.org/show_bug.cgi?id=60510 https://bugs.freedesktop.org/show_bug.cgi?id=66651Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 08 7月, 2013 2 次提交
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由 Maarten Lankhorst 提交于
"drm/nve0-/gr: some new gpc registers can have multiple copies" 5ee86c41 caused a regression for nvc0, because the bit indicating last transfer has occured was no longer set, resulting in random system lockups. Reported-by: NRonald Uitermark <ronald645@gmail.com> Tested-by: NRonald Uitermark <ronald645@gmail.com> Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Reported-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 06 7月, 2013 9 次提交
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由 Alex Deucher 提交于
Allows you to force the selected performance level via sysfs. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Allows you to force the selected performance level via sysfs. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Allows you to force the selected performance level via sysfs. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Allows you to force a performance level via sysfs. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Allows you to limit the selected power levels via sysfs. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
This allows you to force specific power levels within a power state. Due to hardware restrictions between generations, the interface is limited to the following 3 selections: auto: all levels enabled low: forced to the lowest power level high: forced to the highest power level Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
r1xx asics have a slightly different surface register setup compared to newer asics. There is no specific enable bit for macro tiling, rather, to disable macro tiling, you need to set the surface pitch to 0. With this fixed, the special rn50 handling can go. Noticed-by: NMark Kettenis <mark.kettenis@xs4all.nl> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Certain older rv770 asics have both a performance and a 3D performance state rather than just multiple performance levels in the state power state. The current code would select the performance state rather than the 3D performance state when the "performance" profile was selected. This change switches to the "balanced" profile by default which ends up being the internal performance profile. When the user selects the "performance" profile, it selects the internal 3D performance state so the user can select the higher performance modes. For most asics this changes nothing. For certain rv770 asics with static performance and 3D performance states, this allows you to select between then using by selecting the "balanced" and "performance" dpm profiles. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Fix patching of vddc values for SI and enable manually forcing clocks to default levels as per NI. This improves the out of the box performance with SI asics. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 7月, 2013 7 次提交
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由 Dave Airlie 提交于
Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next - GF117 acceleration support - GK110 acceleration-with-blob-ucode support, and initial work towards fixing our own ucode to be suitable. - Large cleanups of fermi/kepler context handling * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (22 commits) drm/nva3/disp: Fix HDMI audio regression drm/nv50-/disp: Use output specific mask in interrupt drm/nouveau: use vmalloc for pgt allocation drm/nvc0-/gr: remove some more of the hardcoded register writes drm/nvc0-/gr: factor out yet more unknown magic into versioned functions drm/nvd7/devinit: use fermi class, not tesla drm/nvf0-/gr: ctxsw scratch reg count got bumped to 16 drm/nvc0-/gr: remove hardcoding of UNK count/mask in GPCCS ucode drm/nvf0/gr: build cs ucode for GK110 drm/nvc0-/gr: extend one of the magic calculations for >4 GPCs drm/nvf0/gr: fix ddx shaders locking up on me drm/nvc0/devinit: minor typo drm/nvf0/gr: enable support, if external cs ucode is available drm/nvf0/gr: magic sequence that makes PGRAPH come out of hiding drm/nvf0/ce: enable support drm/nvf0/fifo: enable support drm/nvd7/gr: initial support drm/nvc0-/gr: generate cs register lists from grctx data drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs drm/nve0-/gr: some new gpc registers can have multiple copies ...
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由 Joonyoung Shim 提交于
We can use prime helpers instead. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Joonyoung Shim 提交于
Instead of using the dma_buf functionality for GEM CMA, we can use prime helpers if we can provide low-level hook functions for GEM CMA. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Joonyoung Shim 提交于
This adds to call low-level mmap() from prime helpers. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Joonyoung Shim 提交于
The drm_gem_map_detach() can be called with sgt is NULL. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next This is final pull request for 3.11. This resolves some memory leak issues, and includes some code and dt document file cleanups; just removed unnecessary descriptions. And the patch work for enhancing hdmiphy driver isn't in progress so this patch may go to 3.12. * 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: remove duplicated error routine and unnecessary assign drm/exynos: fix pages allocation size in lowlevel_buffer_allocate drm/exynos: use drm_calloc_large when allocates pointer array drm/exynos: add error check routine in exynos_drm_open drm/exynos: initialize the buf_num in vp_video_buffer drm/exynos: remove dead code in vidi_power_on drm/exynos: fix not to remain exynos_gem_obj as a leak of/documentation: Update hpd gpio property for exynos_hdmi
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由 Laurent Pinchart 提交于
The DU requires a 16 pixels pitch alignement. Make sure dumb buffers are allocated with the correct pitch, and validate the pitch when creating frame buffers. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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