- 07 2月, 2007 1 次提交
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由 Ishizaki Kou 提交于
Spu management ops in arch/platforms/cell/spu_priv1_mmio.h can be used commonly in of based platform. This patch separates spu management ops from native cell code and uses on celleb platform. Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NKou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 19 12月, 2006 2 次提交
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由 Arnd Bergmann 提交于
The difference between 'nid' and 'node' fields in an spu structure was used incorrectly. The common 'node' number now reflects the NUMA node, and it is used in other places in the code as well. The 'nid' value is meaningful only in one place, namely the computation of the interrupt numbers based on the physical location of an spu. Consequently, we look it up directly in the place where it is used now. Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com>
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由 Benjamin Herrenschmidt 提交于
Some SPU code was a bit too convoluted and broke when adding support for the new style device-tree, most notably the struct pages for SPEs no longer get created. oops... Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com>
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- 04 12月, 2006 1 次提交
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由 Geoff Levand 提交于
This adds a platform specific spu management abstraction and the coresponding routines to support the IBM Cell Blade. It also removes the hypervisor only resources that were included in struct spu. Three new platform specific routines are introduced, spu_enumerate_spus(), spu_create_spu() and spu_destroy_spu(). The underlying design uses a new type, struct spu_management_ops, to hold function pointers that the platform setup code is expected to initialize to instances appropriate to that platform. For the IBM Cell Blade support, I put the hypervisor only resources that were in struct spu into a platform specific data structure struct spu_pdata. Signed-off-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com>
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- 25 10月, 2006 1 次提交
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由 Masato Noguchi 提交于
SPRN_SDR1 and the SPE's MFC SDR are hypervisor resources and are not accessible from a logical partition. This change adds an access wrapper. When running on bare H/W, the spufs needs to only set the SPE's MFC SDR to the value of the PPE's SPRN_SDR1 once at SPE initialization, so this change renames mfc_sdr_set() to mfc_sdr_setup() and moves the access of SPRN_SDR1 into the mmio wrapper. It also removes the now unneeded member mfc_sdr_RW from struct spu_priv1_collapsed. Signed-off-by: NMasato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> -- Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 21 6月, 2006 3 次提交
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由 Geoff Levand 提交于
This changes the hypervisor abstraction of setting cpu affinity to a higher level to avoid platform dependent interrupt controller routines. I replaced spu_priv1_ops:spu_int_route_set() with a new routine spu_priv1_ops:spu_cpu_affinity_set(). As a by-product, this change eliminated what looked like an existing bug in the set affinity code where spu_int_route_set() mistakenly called int_stat_get(). Signed-off-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Geoff Levand 提交于
To support muti-platform binaries the spu hypervisor accessor routines must have runtime binding. I removed the existing statically linked routines in spu.h and spu_priv1_mmio.c and created new accessor routines in spu_priv1.h that operate indirectly through an ops struct spu_priv1_ops. spu_priv1_mmio.c contains the instance of the accessor routines for running on raw hardware. Signed-off-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Geoff Levand 提交于
Creates new config variables PPC_CELL_NATIVE and PPC_IBM_CELL_BLADE. The existing CONFIG_PPC_CELL is now used to denote the generic Cell processor support. PPC_CELL = make descends into platforms/cell PPC_CELL_NATIVE = add bare metal support PPC_IBM_CELL_BLADE = add blade device drivers, etc. Also renames spu_priv1.c to spu_priv1_mmio.c. Signed-off-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NArnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 09 1月, 2006 1 次提交
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由 Arnd Bergmann 提交于
In a hypervisor based setup, direct access to the first priviledged register space can typically not be allowed to the kernel and has to be implemented through hypervisor calls. As suggested by Masato Noguchi, let's abstract the register access trough a number of function calls. Since there is currently no public specification of actual hypervisor calls to implement this, I only provide a place that makes it easier to hook into. Cc: Masato Noguchi <Masato.Noguchi@jp.sony.com> Cc: Geoff Levand <geoff.levand@am.sony.com> Signed-off-by: NArnd Bergmann <arndb@de.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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