- 21 6月, 2016 1 次提交
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由 Sricharan R 提交于
This iommu uses the armv7 short descriptor format. So use the generic ARMV7S pagetable ops instead of rewriting the same stuff in the driver. Signed-off-by: NSricharan R <sricharan@codeaurora.org> Tested-by: NArchit Taneja <architt@codeaurora.org> Tested-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 09 5月, 2016 1 次提交
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由 Joerg Roedel 提交于
The statistics are not really used for anything and should be replaced by generic and per-device statistic counters. Remove the code for now. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 07 4月, 2016 1 次提交
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由 Andy Fleming 提交于
The Freescale PAMU can be enabled on both 32 and 64-bit Power chips. Commit 477ab7a1 restricted PAMU to PPC32. PPC covers both. Signed-off-by: NAndy Fleming <afleming@gmail.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 01 3月, 2016 1 次提交
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由 Robin Murphy 提交于
IOMMU_DMA does indeed depend on scatterlists having a DMA length, but the NEED_SG_DMA_LENGTH symbol should be selected, not depended upon. Reported-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 29 2月, 2016 1 次提交
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由 Arnd Bergmann 提交于
The newly added Mediatek IOMMU driver uses the IOMMU_DMA infrastructure, but unlike other such drivers, it does not select 'ARM_DMA_USE_IOMMU', which is a prerequisite, leading to a link error: warning: (MTK_IOMMU) selects IOMMU_DMA which has unmet direct dependencies (IOMMU_SUPPORT && NEED_SG_DMA_LENGTH) drivers/iommu/built-in.o: In function `iommu_put_dma_cookie': mtk_iommu.c:(.text+0x11fe): undefined reference to `put_iova_domain' drivers/iommu/built-in.o: In function `iommu_dma_init_domain': mtk_iommu.c:(.text+0x1316): undefined reference to `init_iova_domain' drivers/iommu/built-in.o: In function `__iommu_dma_unmap': mtk_iommu.c:(.text+0x1380): undefined reference to `find_iova' This adds the same select that the other drivers have. On a related note, I wonder if we should just always select ARM_DMA_USE_IOMMU whenever any IOMMU driver is enabled. Are there any cases where we would enable an IOMMU but not use it? Signed-off-by: NArnd Bergmann <arnd@arndb.de> Fixes: 0df4fabe ("iommu/mediatek: Add mt8173 IOMMU driver") Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 25 2月, 2016 3 次提交
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由 Yong Wu 提交于
This patch adds support for mediatek m4u (MultiMedia Memory Management Unit). Signed-off-by: NYong Wu <yong.wu@mediatek.com> Reviewed-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Simon Horman 提交于
Make use of ARCH_RENESAS in place of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Marek Szyprowski 提交于
This patch adds support for v5 of SYSMMU controller, found in Samsung Exynos 5433 SoCs. The main difference of v5 is support for 36-bit physical address space and some changes in register layout and core clocks hanging. This patch also adds support for ARM64 architecture, which is used by Exynos 5433 SoCs. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 17 2月, 2016 1 次提交
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由 Robin Murphy 提交于
Add a nearly-complete ARMv7 short descriptor implementation, omitting only a few legacy and CPU-centric aspects which shouldn't be necessary for IOMMU API use anyway. Reviewed-by: NYong Wu <yong.wu@mediatek.com> Tested-by: NYong Wu <yong.wu@mediatek.com> Signed-off-by: NYong Wu <yong.wu@mediatek.com> Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 14 12月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
As of commit 44d88c75 ("ARM: shmobile: Remove legacy SoC code for R-Mobile A1"), the Renesas IPMMU/IPMMUI driver is no longer used. In theory it could still be used on SH-Mobile AG5 and R-Mobile A1 SoCs, but that requires adding DT support to the driver, which is not planned. Remove the driver, it can be resurrected from git history when needed. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 15 10月, 2015 5 次提交
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由 Marc Zyngier 提交于
Despite being a platform device, the SMMUv3 is capable of signaling interrupts using MSIs. Hook it into the platform MSI framework and enjoy faults being reported in a new and exciting way. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> [will: tidied up the binding example and reworked most of the code] Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Robin Murphy 提交于
Taking inspiration from the existing arch/arm code, break out some generic functions to interface the DMA-API to the IOMMU-API. This will do the bulk of the heavy lifting for IOMMU-backed dma-mapping. Since associating an IOVA allocator with an IOMMU domain is a fairly common need, rather than introduce yet another private structure just to do this for ourselves, extend the top-level struct iommu_domain with the notion. A simple opaque cookie allows reuse by other IOMMU API users with their various different incompatible allocator types. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 David Woodhouse 提交于
This provides basic PASID support for endpoint devices, tested with a version of the i915 driver. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
The behaviour if you enable PASID support after ATS is undefined. So we have to enable it first, even if we don't know whether we'll need it. This is safe enough; unless we set up a context that permits it, the device can't actually *do* anything with it. Also shift the feature detction to dmar_insert_one_dev_info() as it only needs to happen once. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 David Woodhouse 提交于
Add CONFIG_INTEL_IOMMU_SVM, and allocate PASID tables on supported hardware. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 06 10月, 2015 2 次提交
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由 Gerald Schaefer 提交于
This adds an IOMMU API implementation for s390 PCI devices. Reviewed-by: NSebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: NGerald Schaefer <gerald.schaefer@de.ibm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Sudeep Dutt 提交于
Revert 'commit 353649e5 ("iommu: Allow iova to be used without requiring IOMMU_SUPPORT"). This commit is made unnecessary by 'commit ac6d83cc ("misc: mic: Fix SCIF build failure with IOMMU_SUPPORT disabled") and will create a conflict upon merging with 4.3-rc4. The correct long term solution is to move the iova library from drivers/iommu into lib/iova which will be done in a future patch. Cc: David Woodhouse <David.Woodhouse@intel.com> Reviewed-by: NAshutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: NSudeep Dutt <sudeep.dutt@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 04 10月, 2015 2 次提交
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由 Sudeep Dutt 提交于
iova is a library which can be built without IOMMU_SUPPORT Signed-off-by: NSudeep Dutt <sudeep.dutt@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sakari Ailus 提交于
The iova library has use outside the intel-iommu driver, thus make it a module. Signed-off-by: NSakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 23 9月, 2015 1 次提交
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由 Robin Murphy 提交于
In checking whether DMA addresses differ from physical addresses, using dma_to_phys() is actually the wrong thing to do, since it may hide any DMA offset, which is precisely one of the things we are checking for. Simply casting between the two address types, whilst ugly, is in fact the appropriate course of action. Further care (and ugliness) is also necessary in the comparison to avoid truncation if phys_addr_t and dma_addr_t differ in size. We can also reject any device with a fixed DMA offset up-front at page table creation, leaving the allocation-time check for the more subtle cases like bounce buffering due to an incorrect DMA mask. Furthermore, we can then fix the hackish KConfig dependency so that architectures without a dma_to_phys() implementation may still COMPILE_TEST (or even use!) the code. The true dependency is on the DMA API, so use the appropriate symbol for that. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> [will: folded in selftest fix from Yong Wu] Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 13 8月, 2015 1 次提交
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由 Thierry Reding 提交于
Add the table of memory clients and SWGROUPs for Tegra210 to enable SMMU support for this new SoC. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 06 8月, 2015 1 次提交
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由 Robin Murphy 提交于
Currently, users of the LPAE page table code are (ab)using dma_map_page() as a means to flush page table updates for non-coherent IOMMUs. Since from the CPU's point of view, creating IOMMU page tables *is* passing DMA buffers to a device (the IOMMU's page table walker), there's little reason not to use the DMA API correctly. Allow IOMMU drivers to opt into DMA API operations for page table allocation and updates by providing their appropriate device pointer. The expectation is that an LPAE IOMMU should have a full view of system memory, so use streaming mappings to avoid unnecessary pressure on ZONE_DMA, and treat any DMA translation as a warning sign. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 28 7月, 2015 1 次提交
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由 Sakari Ailus 提交于
The iova library has use outside the intel-iommu driver, thus make it a module. Signed-off-by: NSakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 02 6月, 2015 1 次提交
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由 Gerd Hoffmann 提交于
After adding virtio-gpu I get this funky kconfig dependency loop. scripts/kconfig/conf --oldconfig Kconfig drivers/video/fbdev/Kconfig:5:error: recursive dependency detected! drivers/video/fbdev/Kconfig:5: symbol FB is selected by DRM_KMS_FB_HELPER drivers/gpu/drm/Kconfig:34: symbol DRM_KMS_FB_HELPER is selected by DRM_VIRTIO_GPU drivers/gpu/drm/virtio/Kconfig:1: symbol DRM_VIRTIO_GPU depends on VIRTIO drivers/virtio/Kconfig:1: symbol VIRTIO is selected by REMOTEPROC drivers/remoteproc/Kconfig:4: symbol REMOTEPROC is selected by OMAP_REMOTEPROC drivers/remoteproc/Kconfig:12: symbol OMAP_REMOTEPROC depends on OMAP_IOMMU drivers/iommu/Kconfig:141: symbol OMAP_IOMMU is selected by VIDEO_OMAP3 drivers/media/platform/Kconfig:96: symbol VIDEO_OMAP3 depends on VIDEO_V4L2 drivers/media/v4l2-core/Kconfig:6: symbol VIDEO_V4L2 depends on I2C drivers/i2c/Kconfig:7: symbol I2C is selected by FB_DDC drivers/video/fbdev/Kconfig:59: symbol FB_DDC is selected by FB_CYBER2000_DDC drivers/video/fbdev/Kconfig:374: symbol FB_CYBER2000_DDC depends on FB_CYBER2000 drivers/video/fbdev/Kconfig:362: symbol FB_CYBER2000 depends on FB Making VIDEO_OMAP3 depend on OMAP_IOMMU instead of selecting it breaks the loop, which looks like the best way to handle it to me. Updated OMAP_IOMMU help text accordingly. Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Acked-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
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- 29 5月, 2015 1 次提交
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由 Will Deacon 提交于
Version three of the ARM SMMU architecture introduces significant changes and improvements over previous versions of the specification, necessitating a new driver in the Linux kernel. The main change to the programming interface is that the majority of the configuration data has been moved from MMIO registers to in-memory data structures, with communication between the CPU and the SMMU being mediated via in-memory circular queues. This patch adds an initial driver for SMMUv3 to Linux. We currently support pinned stage-1 (DMA) and stage-2 (KVM VFIO) mappings using the generic IO-pgtable code. Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 04 5月, 2015 1 次提交
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由 Thierry Reding 提交于
The memory controller on Tegra132 is very similar to the one found on Tegra124. But the Denver CPUs don't have an outer cache, so dcache maintenance is done slightly differently. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 03 3月, 2015 1 次提交
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由 Jean Delvare 提交于
If io-pgtable-arm is an ARM-specific driver then configuration option IOMMU_IO_PGTABLE_LPAE should not be presented to the user by default for non-ARM kernels. Signed-off-by: NJean Delvare <jdelvare@suse.de> Cc: Will Deacon <will.deacon@arm.com> Cc: Joerg Roedel <joro@8bytes.org> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 25 2月, 2015 1 次提交
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由 Thierry Reding 提交于
The MSM IOMMU driver unconditionally calls bus_set_iommu(), which is a very stupid thing to do on multi-platform kernels. While marking the driver BROKEN may seem a little extreme, there is no other way to make the driver skip initialization. One of the problems is that it doesn't have devicetree binding documentation and the driver doesn't contain a struct of_device_id table either, so no way to check that it is indeed valid to set up the IOMMU operations for this driver. This fixes a problem on Tegra20 where the DRM driver will try to use the obviously non-existent MSM IOMMU. Marking the driver BROKEN shouldn't do any harm, since there aren't any users currently. There is no struct of_device_id table, so the device can't be instantiated from device tree, and I couldn't find any code that would instantiate a matching platform_device either, so the driver is effectively unused. Reported-by: NNicolas Chauvet <kwizart@gmail.com> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Olav Haugan <ohaugan@codeaurora.org> Acked-by: NRob Clark <robdclark@gmail.com> Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 30 1月, 2015 2 次提交
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由 Joerg Roedel 提交于
For easier compile testing of these iommu drivers. Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Arnd Bergmann 提交于
A lot of the IOMMU support code does not build if the CPU does not have an MMU itself, and it's not clear if there is any use case for it, so let's just disable it and wait for anybody to need it. This avoids randconfig errors like ../arch/arm/mm/dma-mapping.c: In function '__iommu_alloc_remap': ../arch/arm/mm/dma-mapping.c:1278:34: error: 'VM_ARM_DMA_CONSISTENT' undeclared (first use in this function) area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP, ^ ../arch/arm/mm/dma-mapping.c:1278:34: note: each undeclared identifier is reported only once for each function it appears in ../arch/arm/mm/dma-mapping.c: In function '__atomic_get_pages': ../arch/arm/mm/dma-mapping.c:1358:27: error: 'atomic_pool' undeclared (first use in this function) struct dma_pool *pool = &atomic_pool; Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 26 1月, 2015 1 次提交
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由 Laurent Pinchart 提交于
Replace the custom page table allocation implementation with the standard allocator. The driver loses the ability to map 64kB chunkgs using the PTE contiguous hint, hence the removal of the SZ_64K page size from the IOMMU page sizes bitmap. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 19 1月, 2015 5 次提交
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由 Will Deacon 提交于
The ARM SMMU can walk LPAE page tables, so make use of the generic allocator. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
This patch adds a series of basic self-consistency tests to the ARM LPAE IO page table allocator that exercise corner cases in map/unmap, as well as testing all valid configurations of pagesize, ias and stage. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
A number of IOMMUs found in ARM SoCs can walk architecture-compatible page tables. This patch adds a generic allocator for Stage-1 and Stage-2 v7/v8 long-descriptor page tables. 4k, 16k and 64k pages are supported, with up to 4-levels of walk to cover a 48-bit address space. Tested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
This patch introduces a generic framework for allocating page tables for an IOMMU. There are a number of reasons we want to do this: - It avoids duplication of complex table management code in IOMMU drivers that use the same page table format - It removes any coupling with the CPU table format (and even the architecture!) - It defines an API for IOMMU TLB maintenance Tested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Robin Murphy 提交于
In preparation for sharing the IOVA allocator, split it out under its own Kconfig symbol. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 17 12月, 2014 1 次提交
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由 Mark Brown 提交于
The Exynos IOMMU driver uses the ARM specific dmac_flush_range() and outer_flush_range() functions. This breaks the build on arm64 allmodconfig in -next since support has been merged for some Exynos ARMv8 SoCs. Add a dependency on ARM to keep things building until either the driver has the ARM dependencies removed or the ARMv8 architecture code implements these ARM specific APIs. Signed-off-by: NMark Brown <broonie@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 04 12月, 2014 1 次提交
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由 Thierry Reding 提交于
The memory controller on NVIDIA Tegra exposes various knobs that can be used to tune the behaviour of the clients attached to it. Currently this driver sets up the latency allowance registers to the HW defaults. Eventually an API should be exported by this driver (via a custom API or a generic subsystem) to allow clients to register latency requirements. This driver also registers an IOMMU (SMMU) that's implemented by the memory controller. It is supported on Tegra30, Tegra114 and Tegra124 currently. Tegra20 has a GART instead. The Tegra SMMU operates on memory clients and SWGROUPs. A memory client is a unidirectional, special-purpose DMA master. A SWGROUP represents a set of memory clients that form a logical functional unit corresponding to a single device. Typically a device has two clients: one client for read transactions and one client for write transactions, but there are also devices that have only read clients, but many of them (such as the display controllers). Because there is no 1:1 relationship between memory clients and devices the driver keeps a table of memory clients and the SWGROUPs that they belong to per SoC. Note that this is an exception and due to the fact that the SMMU is tightly integrated with the rest of the Tegra SoC. The use of these tables is discouraged in drivers for generic IOMMU devices such as the ARM SMMU because the same IOMMU could be used in any number of SoCs and keeping such tables for each SoC would not scale. Acked-by: NJoerg Roedel <jroedel@suse.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 02 12月, 2014 1 次提交
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由 Will Deacon 提交于
The generic IOMMU device-tree bindings can be used to add arbitrary OF masters to an IOMMU with a compliant binding. This patch introduces of_iommu_configure, which does exactly that. Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NJoerg Roedel <jroedel@suse.de> Acked-by: NMarek Szyprowski <m.szyprowski@samsung.com> Tested-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 05 11月, 2014 1 次提交
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由 Joerg Roedel 提交于
Add optional CONFIG_COMPILE_TEST to dependency list. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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