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  1. 10 11月, 2015 2 次提交
  3. 06 10月, 2015 3 次提交
  5. 05 10月, 2015 1 次提交
  7. 09 9月, 2015 1 次提交
  9. 27 3月, 2015 1 次提交
  11. 11 3月, 2015 1 次提交
  13. 04 2月, 2015 1 次提交
    • P
      Documentation: DT bindings: add more Tegra chip compatible strings · 193c9d23
      由 Paul Walmsley 提交于 
      Align compatible strings for several IP blocks present on Tegra chips
with the latest doctrine from the DT maintainers:

http://marc.info/?l=devicetree&m=142255654213019&w=2

The primary objective here is to avoid checkpatch warnings, per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

DT binding text files have been updated for the following IP blocks:

- PCIe
- SOR
- SoC timers
- AHB "gizmo"
- APB_MISC
- pinmux control
- UART
- PWM
- I2C
- SPI
- RTC
- PMC
- eFuse
- AHCI
- HDA
- XUSB_PADCTRL
- SDHCI
- SOC_THERM
- AHUB
- I2S
- EHCI
- USB PHY

N.B. The nvidia,tegra20-timer compatible string is removed from the
nvidia,tegra30-timer.txt documentation file because it's already
mentioned in the nvidia,tegra20-timer.txt documentation file.

This second version takes into account the following requests from
Rob Herring <robherring2@gmail.com>:

- Per-IP block patches have been combined into a single patch

- Explicit documentation about which compatible strings are actually
  matched by the driver has been removed.  In its place is implicit
  documentation that loosely follows Rob's prescribed format:

  "Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where
   <chip> is tegra30, tegra132, ..." [...]  "You should attempt to
   document known values of <chip> if you use it"
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Dylan Reid <dgreid@chromium.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Jingchang Lu <jingchang.lu@freescale.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mikko Perttunen <mperttunen@nvidia.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Peter Hurley <peter@hurleysoftware.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Tejun Heo <tj@kernel.org>
Cc: "Terje Bergström" <tbergstrom@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-i2c@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-pwm@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Acked-by: NEduardo Valentin <edubezval@gmail.com>
Signed-off-by: NRob Herring <robh@kernel.org>
      193c9d23
  15. 30 1月, 2015 2 次提交
  17. 17 11月, 2014 2 次提交
  19. 26 8月, 2014 1 次提交
  21. 20 8月, 2014 1 次提交
  23. 08 8月, 2014 1 次提交
  25. 07 8月, 2014 1 次提交
  27. 11 7月, 2014 1 次提交
  29. 28 4月, 2014 1 次提交
  31. 19 3月, 2014 2 次提交
  33. 21 1月, 2014 1 次提交
  35. 17 12月, 2013 1 次提交
  37. 12 12月, 2013 2 次提交
  39. 04 12月, 2013 1 次提交
    • M
      pwm: pxa: Add device tree support · b52fa7bc
      由 Mike Dunn 提交于 
      This patch adds device tree support to the PXA's PWM driver.  Nothing
needs to be extracted from the device tree node by the PWM device.
Client devices need only specify the period; the per-chip index is
implicitly zero because one device node must be present for each PWM
output in use.  This approach is more convenient due to the wide
variability in the number of PWM channels present across the various PXA
variants, and is made possible by the fact that the register sets for
each PWM channel are segregated from each other.  An of_xlate() method
is added to parse this single-cell node.  The existing ID table is
reused for the match table data.

Tested on a Palm Treo 680 (both platform data and DT cases).
Signed-off-by: NMike Dunn <mikedunn@newsguy.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>
      b52fa7bc
  41. 11 11月, 2013 1 次提交
  43. 07 9月, 2013 1 次提交
  45. 03 9月, 2013 3 次提交
  47. 12 6月, 2013 1 次提交
  49. 29 4月, 2013 1 次提交
  51. 08 4月, 2013 2 次提交
  53. 09 1月, 2013 1 次提交
  55. 08 1月, 2013 1 次提交
    • B
      pwm: atmel: add Timer Counter Block PWM driver · 9421bade
      由 Boris BREZILLON 提交于 
      This patch adds a PWM driver based on Atmel Timer Counter Block. The
Timer Counter Block is used in Waveform generator mode.

A Timer Counter Block provides up to 6 PWM devices grouped by 2:
* group 0 = PWM 0 and 1
* group 1 = PWM 2 and 3
* group 2 = PMW 4 and 5

PWM devices in a given group must be configured with the same period
value. If a PWM device in a group tries to change the period value and
the other device is already configured with a different value an error
will be returned.

This driver requires device tree support. The Timer Counter Block number
used to create a PWM chip is given by the tc-block field in an
"atmel,tcb-pwm" compatible node.

This patch was tested on kizbox board (at91sam9g20 SoC) with pwm-leds.
Signed-off-by: NBoris BREZILLON <linux-arm@overkiz.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
      9421bade
  57. 28 11月, 2012 2 次提交