This patch adds 405 platform support to the 440 NDFC driver. The new
AMCC 405EZ PPC is equipped with the same NDFC core as the 440EP(x)
and other will follow soon.
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

The writel() call accidentally clears all bits in the NDFC_CCR
register (endianess problem). Now __raw_writel() is used instead.

Tested on Bamboo with NAND on chip select 0 and chip select 1.
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Due to this typo, a wrong ECC layout table is chosen.
Signed-off-by: NFrank Haverkamp <haver@vnet.ibm.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

The rework of the command handling in the nand driver
led to wrong address setting in the command control
function. Use the correct address again.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Remove the remains of a broken merge.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The nand_oobinfo structure is not fitting the newer error correction
demands anymore. Replace it by struct nand_ecclayout and fixup the users
all over the place. Keep the nand_oobinfo based ioctl for user space
compability reasons.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The platform structure was lacking an oobinfo field.
The NDFC driver had some remains from another tree.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The lock simplifying patch did not move the lock and waitqueue
initialization into the controller allocation patch.
This reinitializes waitqueue and spinlocks also for driver
supplied controller stuctures. Move it into the allocation path.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

First step of modularizing ECC support.
- Move ECC related functionality into a seperate embedded data structure
- Get rid of the hardware dependend constants to simplify new ECC models
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

NDFC NAND Flash controller is embedded in PPC EP44x SoCs.
Add platform driver based support.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>