1. 28 11月, 2016 4 次提交
    • R
      drm/msm/mdp5: dynamically assign hw pipes to planes · 4a0f012d
      Rob Clark 提交于
      (re)assign the hw pipes to planes based on required caps, and to handle
      situations where we could not modify an in-use plane (ie. SMP block
      reallocation).
      
      This means all planes advertise the superset of formats and properties.
      Userspace must (as always) use atomic TEST_ONLY step for atomic updates,
      as not all planes may be available for use on every frame.
      
      The mapping of hwpipe to plane is stored in mdp5_state, so that state
      updates are atomically committed in the same way that plane/etc state
      updates are managed.  This is needed because the mdp5_plane_state keeps
      a pointer to the hwpipe, and we don't want global state to become out
      of sync with the plane state if an atomic update fails, we hit deadlock/
      backoff scenario, etc.  The use of state_lock keeps multiple parallel
      updates which both re-assign hwpipes properly serialized.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      4a0f012d
    • R
      drm/msm/mdp5: introduce mdp5_hw_pipe · c056b55d
      Rob Clark 提交于
      Split out the hardware pipe specifics from mdp5_plane.  To start, the hw
      pipes are statically assigned to planes, but next step is to assign the
      hw pipes during plane->atomic_check() based on requested caps (scaling,
      YUV, etc).  And then hw pipe re-assignment if required if required SMP
      blocks changes.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      Reviewed-by: NArchit Taneja <architt@codeaurora.org>
      c056b55d
    • R
      drm/msm/mdp5: nuke mdp5_plane_complete_flip() · a2100695
      Rob Clark 提交于
      We can do this all from mdp5_plane_complete_commit(), so simplify things
      a bit and drop mdp5_plane_complete_flip().
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      a2100695
    • R
      drm/msm/mdp5: drop mdp5_crtc::name · cee26588
      Rob Clark 提交于
      Plane's (pipes) can be assigned dynamically with atomic, so it doesn't
      make much sense to name the pipe after it's primary plane.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      cee26588
  2. 27 11月, 2016 1 次提交
    • R
      drm/msm/mdp5: handle non-fullscreen base plane case · 1455adbd
      Rob Clark 提交于
      If the bottom-most layer is not fullscreen, we need to use the BASE
      mixer stage for solid fill (ie. MDP5_CTL_BLEND_OP_FLAG_BORDER_OUT).  The
      blend_setup() code pretty much handled this already, we just had to
      figure this out in _atomic_check() and assign the stages appropriately.
      
      Also fix the case where there are zero enabled planes, where we also
      need to enable BORDER_OUT.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      1455adbd
  3. 16 7月, 2016 1 次提交
  4. 02 6月, 2016 1 次提交
  5. 17 5月, 2016 1 次提交
  6. 02 5月, 2016 1 次提交
  7. 05 3月, 2016 1 次提交
  8. 03 3月, 2016 1 次提交
  9. 08 2月, 2016 1 次提交
  10. 11 12月, 2015 1 次提交
    • V
      drm: Pass 'name' to drm_crtc_init_with_planes() · f9882876
      Ville Syrjälä 提交于
      Done with coccinelle for the most part. However, it thinks '...' is
      part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder
      in its place and got rid of it with sed afterwards.
      
      I didn't convert drm_crtc_init() since passing the varargs through
      would mean either cpp macros or va_list, and I figured we don't
      care about these legacy functions enough to warrant the extra pain.
      
      @@
      identifier dev, crtc, primary, cursor, funcs;
      @@
       int drm_crtc_init_with_planes(struct drm_device *dev,
                                     struct drm_crtc *crtc,
                                     struct drm_plane *primary, struct drm_plane *cursor,
                                     const struct drm_crtc_funcs *funcs
      +                              ,const char *name, int DOTDOTDOT
                                     )
      { ... }
      
      @@
      identifier dev, crtc, primary, cursor, funcs;
      @@
       int drm_crtc_init_with_planes(struct drm_device *dev,
                                     struct drm_crtc *crtc,
                                     struct drm_plane *primary, struct drm_plane *cursor,
                                     const struct drm_crtc_funcs *funcs
      +                              ,const char *name, int DOTDOTDOT
                                     );
      
      @@
      expression E1, E2, E3, E4, E5;
      @@
       drm_crtc_init_with_planes(E1, E2, E3, E4, E5
      +                          ,NULL
                                 )
      
      v2: Split crtc and plane changes apart
          Pass NULL for no-name instead of ""
          Leave drm_crtc_init() alone
      v3: Add ', or NULL...' to @name kernel doc (Jani)
          Annotate the function with __printf() attribute (Jani)
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/1449670771-2751-1-git-send-email-ville.syrjala@linux.intel.com
      f9882876
  11. 16 8月, 2015 3 次提交
  12. 27 7月, 2015 1 次提交
  13. 12 6月, 2015 3 次提交
    • H
      drm/msm/mdp5: Wait for PP_DONE irq for command mode CRTC atomic commit · 68cdbed9
      Hai Li 提交于
      CRTCs in DSI command mode data path should wait for pingpong done,
      instead of vblank, to finish atomic commit.
      
      This change is to enable PP_DONE irq on command mode CRTCs and wait for
      this irq happens before atomic commit completion.
      Signed-off-by: NHai Li <hali@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      68cdbed9
    • H
      drm/msm: Use customized function to wait for atomic commit done · 0a5c9aad
      Hai Li 提交于
      MDP FLUSH registers could indicate if the previous flush updates
      has taken effect at vsync boundary. Making use of this H/W feature
      can catch the vsync that happened between CRTC atomic_flush and
      *_wait_for_vblanks, to avoid unnecessary wait.
      
      This change allows kms CRTCs to use their own *_wait_for_commit_done
      functions to wait for FLUSH register cleared at vsync, before commit
      completion.
      Signed-off-by: NHai Li <hali@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      0a5c9aad
    • R
      drm/msm/mdp5: fix for crash in disable path · e5989ee1
      Rob Clark 提交于
      Seems like disable can race with complete_flip() in process of disabling
      a crtc, leading to:
      
      [   49.065364] Call trace:
      [   49.071441] [<ffffffc00041d5a0>] mdp5_ctl_blend+0x20/0x1c0
      [   49.073788] [<ffffffc00041ebcc>] mdp5_crtc_disable+0x3c/0xa8
      [   49.079348] [<ffffffc0003e7854>] disable_outputs.isra.4+0x11c/0x220
      [   49.085164] [<ffffffc0003e7afc>] drm_atomic_helper_commit_modeset_disables+0x14/0x38
      [   49.091155] [<ffffffc000425c80>] complete_commit+0x40/0xb8
      [   49.099136] [<ffffffc0004260ac>] msm_atomic_commit+0x364/0x398
      [   49.104430] [<ffffffc00040a614>] drm_atomic_commit+0x3c/0x70
      [   49.110249] [<ffffffc0003e67b8>] drm_atomic_helper_set_config+0x1b0/0x3e0
      [   49.116065] [<ffffffc0003f99bc>] drm_mode_set_config_internal+0x64/0xf8
      [   49.122746] [<ffffffc0003fa624>] drm_framebuffer_remove+0xe4/0x128
      [   49.129171] [<ffffffc0003feaf8>] drm_mode_rmfb+0xc0/0x100
      [   49.135420] [<ffffffc0003efba8>] drm_ioctl+0x258/0x4d0
      [   49.140889] [<ffffffc0001b0388>] do_vfs_ioctl+0x338/0x5d0
      [   49.145921] [<ffffffc0001b06a8>] SyS_ioctl+0x88/0xa0
      
      It makes no sense to free the ctl without disabling all stages, so lets
      just move them together to avoid the crash.
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      e5989ee1
  14. 02 4月, 2015 4 次提交
    • H
      drm/msm/mdp5: Enable DSI connector in msm drm driver · d5af49c9
      Hai Li 提交于
      This change adds the support in mdp5 kms driver for single
      and dual DSI. Dual DSI case depends on the framework API
      and sequence change to support dual data path.
      
      v1: Initial change
      v2: Address Rob Clark's comment
      - Separate command mode encoder to a new file mdp5_cmd_encoder.c
      - Rebase to not depend on msm_drm_sub_dev change
      Signed-off-by: NHai Li <hali@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      d5af49c9
    • S
      drm/msm/mdp5: Add START signal to kick off certain pipelines · 389b09a1
      Stephane Viau 提交于
      Some interfaces (WB, DSI Command Mode) need to be kicked off
      through a START Signal. This signal needs to be sent at the right
      time and requests in some cases to keep track of the pipeline
      status (eg: whether pipeline registers are flushed AND output WB
      buffers are ready, in case of WB interface).
      Signed-off-by: NStephane Viau <sviau@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      389b09a1
    • S
      drm/msm/mdp5: Enhance operation mode for pipeline configuration · d145dd78
      Stephane Viau 提交于
      DSI and WB interfaces need a more complex pipeline configuration
      than the current mdp5_ctl_set_intf().
      
      For example, memory output connections need to be selected for
      WB. Interface mode (Video vs. Command modes) also need to be
      configured for DSI.
      
      This change takes care of configuring the whole pipeline as far
      as operation mode goes. DSI and WB interfaces will be added
      later.
      
      v2: rename macro to mdp5_cfg_intf_is_virtual() [pointed by Archit]
      Signed-off-by: NStephane Viau <sviau@codeaurora.org>
      [Remove temp bisectability hack -Rob]
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      d145dd78
    • S
      drm/msm/mdp5: only flush on a CRTC ->atomic_flush() · a73f3382
      Stephane Viau 提交于
      MDP5 hardware has some limitation and requires to avoid flushing
      registers more than once between two Vblanks.
      
      This change removes all FLUSH operations (except for HW cursor)
      beside the one coming from a CRTC's ->atomic_flush().
      
      This avoid this type of behavior (eg: CRTC + 1 plane overlay):
      
      	[drm:mdp5_crtc_vblank_irq] vblank
      	[drm:mdp5_ctl_commit] flush (20048)   CTL + LM0 + RGB0
      	[drm:mdp5_ctl_commit] flush (20040)   CTL + LM0
      	[drm:mdp5_crtc_vblank_irq] blank
      	[drm:mdp5_ctl_commit] flush (20049)   CTL + LM0 + RGB0 + VIG0
      	[drm:mdp5_crtc_vblank_irq] blank
      
      and replaces it by:
      
      	[drm:mdp5_crtc_vblank_irq] vblank
      	[drm:mdp5_ctl_commit] flush (20048)   CTL + LM0 + RGB0
      	[drm:mdp5_crtc_vblank_irq] blank
      	[drm:mdp5_ctl_commit] flush (20049)   CTL + LM0 + RGB0 + VIG0
      	[drm:mdp5_crtc_vblank_irq] blank
      
      Only *one* FLUSH is called between Vblanks interrupts.
      Signed-off-by: NStephane Viau <sviau@codeaurora.org>
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      a73f3382
  15. 05 3月, 2015 4 次提交
  16. 02 2月, 2015 3 次提交
  17. 19 12月, 2014 2 次提交
  18. 10 12月, 2014 1 次提交
  19. 27 11月, 2014 1 次提交
  20. 21 11月, 2014 4 次提交
  21. 17 11月, 2014 1 次提交