1. 16 6月, 2008 1 次提交
  2. 09 6月, 2008 1 次提交
  3. 03 6月, 2008 1 次提交
  4. 24 5月, 2008 1 次提交
  5. 29 4月, 2008 1 次提交
    • K
      [POWERPC] Add IRQSTACKS support on ppc32 · 85218827
      Kumar Gala 提交于
      This makes it possible to use separate stacks for hard and soft IRQs
      on 32-bit powerpc as well as on 64-bit.  The code for 32-bit is just
      the 32-bit analog of the 64-bit code.
      
      * Added allocation and initialization of the irq stacks.  We limit the
        stacks to be in lowmem for ppc32.
      * Implemented ppc32 versions of call_do_softirq() and call_handle_irq()
        to switch the stack pointers
      * Reworked how we do stack overflow detection.  We now keep around the
        limit of the stack in the thread_struct and compare against the limit
        to see if we've overflowed.  We can now use this on ppc64 if desired.
      
      [ paulus@samba.org: Fixed bug on 6xx where we need to reload r9 with the
        thread_info pointer. ]
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      85218827
  6. 18 4月, 2008 1 次提交
  7. 17 4月, 2008 1 次提交
    • B
      [POWERPC] Fixup softirq preempt count · e6768a4f
      Benjamin Herrenschmidt 提交于
      This fixes the handling of the preempt count when switching
      interrupt stacks so that HW interrupt properly get the softirq
      mask copied over from the previous stack.
      
      It also initializes the softirq stack preempt_count to 0 instead
      of SOFTIRQ_OFFSET, like x86, as __do_softirq() does the increment,
      and we hit some lockdep checks if we have it twice.
      
      That means we do run for a little while off the softirq stack
      with the preempt-count set to 0, which could be deadly if we
      try to take a softirq at that point, however we do so with
      interrupts disabled, so I think we are ok.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e6768a4f
  8. 03 4月, 2008 1 次提交
    • B
      [POWERPC] Fix iSeries hard irq enabling regression · ff3da2e0
      Benjamin Herrenschmidt 提交于
      A subtle bug sneaked into iSeries recently.  On this platform, we must
      not normally clear MSR:EE (the hardware external interrupt enable)
      except for short periods of time.  Taking an interrupt while
      soft-disabled doesn't cause us to clear it for example.
      
      The iSeries kernel expects to mostly run with MSR:EE enabled at all
      times except in a few exception entry/exit code paths.  Thus
      local_irq_enable() doesn't check if it needs to hard-enable as it
      expects this to be unnecessary on iSeries.
      
      However, hard_irq_disable() _does_ cause MSR:EE to be cleared,
      including on iSeries.  A call to it was recently added to the
      context switch code, thus causing interrupts to become disabled
      for a long periods of time, causing the iSeries watchdog to kick
      in under some circumstances and other nasty things.
      
      This patch fixes it by making local_irq_enable() properly re-enable
      MSR:EE on iSeries.  It basically removes a return statement here
      to make iSeries use the same code path as everybody else.  That does
      mean that we might occasionally get spurious decrementer interrupts
      but I don't think that matters.
      
      Another option would have been to make hard_irq_disable() a nop
      on iSeries but I didn't like it much, in case we have good reasons
      to hard-disable.
      
      Part of the patch is fixes to make sure the hard_enabled PACA field
      is properly set on iSeries as it used not to be before, since it
      was mostly unused.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      ff3da2e0
  9. 20 10月, 2007 1 次提交
  10. 11 10月, 2007 1 次提交
  11. 03 10月, 2007 1 次提交
  12. 13 9月, 2007 5 次提交
  13. 22 8月, 2007 1 次提交
  14. 26 7月, 2007 1 次提交
    • K
      [POWREPC] Fixup a number of modpost warnings on ppc32 · 282045b4
      Kumar Gala 提交于
      Fixed the following warnings:
      
      WARNING: vmlinux.o(.text+0x2934): Section mismatch: reference to .init.text:__alloc_bootmem (between 'irq_alloc_host' and 'irq_set_default_host')
      WARNING: vmlinux.o(.text+0xb2aa): Section mismatch: reference to .init.data:boot_command_line (between 'register_early_udbg_console' and 'udbg_printf')
      WARNING: vmlinux.o(.text+0xb2b2): Section mismatch: reference to .init.data:boot_command_line (between 'register_early_udbg_console' and 'udbg_printf')
      WARNING: vmlinux.o(.text+0xe354): Section mismatch: reference to .init.text:__alloc_bootmem (between 'pcibios_alloc_controller' and 'pci_domain_nr')
      WARNING: vmlinux.o(.text+0x12768): Section mismatch: reference to .init.text:update_bridge_resource (between 'quirk_fsl_pcie_transparent' and 'indirect_read_config')
      WARNING: vmlinux.o(.text+0x127a8): Section mismatch: reference to .init.text:update_bridge_resource (between 'quirk_fsl_pcie_transparent' and 'indirect_read_config')
      WARNING: vmlinux.o(.text+0x17566c): Section mismatch: reference to .init.text:pcibios_fixup_bus (between 'pci_scan_child_bus' and 'pci_scan_bus_parented')
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      282045b4
  15. 10 7月, 2007 1 次提交
  16. 02 7月, 2007 1 次提交
  17. 25 6月, 2007 3 次提交
  18. 14 6月, 2007 1 次提交
  19. 02 6月, 2007 1 次提交
  20. 11 5月, 2007 1 次提交
  21. 08 5月, 2007 1 次提交
  22. 02 5月, 2007 1 次提交
  23. 30 4月, 2007 1 次提交
  24. 05 3月, 2007 1 次提交
    • E
      [PATCH] msi: sanely support hardware level msi disabling · f5f2b131
      Eric W. Biederman 提交于
      In some cases when we are not using msi we need a way to ensure that the
      hardware does not have an msi capability enabled.  Currently the code has been
      calling disable_msi_mode to try and achieve that.  However disable_msi_mode
      has several other side effects and is only available when msi support is
      compiled in so it isn't really appropriate.
      
      Instead this patch implements pci_msi_off which disables all msi and msix
      capabilities unconditionally with no additional side effects.
      
      pci_disable_device was redundantly clearing the bus master enable flag and
      clearing the msi enable bit.  A device that is not allowed to perform bus
      mastering operations cannot generate intx or msi interrupt messages as those
      are essentially a special case of dma, and require bus mastering.  So the call
      in pci_disable_device to disable msi capabilities was redundant.
      
      quirk_pcie_pxh also called disable_msi_mode and is updated to use pci_msi_off.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Michael Ellerman <michael@ellerman.id.au>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f5f2b131
  25. 08 2月, 2007 1 次提交
  26. 24 1月, 2007 1 次提交
  27. 04 12月, 2006 2 次提交
  28. 25 10月, 2006 1 次提交
  29. 16 10月, 2006 1 次提交
    • P
      [POWERPC] Lazy interrupt disabling for 64-bit machines · d04c56f7
      Paul Mackerras 提交于
      This implements a lazy strategy for disabling interrupts.  This means
      that local_irq_disable() et al. just clear the 'interrupts are
      enabled' flag in the paca.  If an interrupt comes along, the interrupt
      entry code notices that interrupts are supposed to be disabled, and
      clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
      flag in the paca, and returns.  This means that interrupts only
      actually get disabled in the processor when an interrupt comes along.
      
      When interrupts are enabled by local_irq_enable() et al., the code
      sets the interrupts-enabled flag in the paca, and then checks whether
      interrupts got hard-disabled.  If so, it also sets the EE bit in the
      MSR to hard-enable the interrupts.
      
      This has the potential to improve performance, and also makes it
      easier to make a kernel that can boot on iSeries and on other 64-bit
      machines, since this lazy-disable strategy is very similar to the
      soft-disable strategy that iSeries already uses.
      
      This version renames paca->proc_enabled to paca->soft_enabled, and
      changes a couple of soft-disables in the kexec code to hard-disables,
      which should fix the crash that Michael Ellerman saw.  This doesn't
      yet use a reserved CR field for the soft_enabled and hard_enabled
      flags.  This applies on top of Stephen Rothwell's patches to make it
      possible to build a combined iSeries/other kernel.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      d04c56f7
  30. 10 10月, 2006 1 次提交
  31. 07 10月, 2006 1 次提交
  32. 05 10月, 2006 1 次提交
    • D
      IRQ: Maintain regs pointer globally rather than passing to IRQ handlers · 7d12e780
      David Howells 提交于
      Maintain a per-CPU global "struct pt_regs *" variable which can be used instead
      of passing regs around manually through all ~1800 interrupt handlers in the
      Linux kernel.
      
      The regs pointer is used in few places, but it potentially costs both stack
      space and code to pass it around.  On the FRV arch, removing the regs parameter
      from all the genirq function results in a 20% speed up of the IRQ exit path
      (ie: from leaving timer_interrupt() to leaving do_IRQ()).
      
      Where appropriate, an arch may override the generic storage facility and do
      something different with the variable.  On FRV, for instance, the address is
      maintained in GR28 at all times inside the kernel as part of general exception
      handling.
      
      Having looked over the code, it appears that the parameter may be handed down
      through up to twenty or so layers of functions.  Consider a USB character
      device attached to a USB hub, attached to a USB controller that posts its
      interrupts through a cascaded auxiliary interrupt controller.  A character
      device driver may want to pass regs to the sysrq handler through the input
      layer which adds another few layers of parameter passing.
      
      I've build this code with allyesconfig for x86_64 and i386.  I've runtested the
      main part of the code on FRV and i386, though I can't test most of the drivers.
      I've also done partial conversion for powerpc and MIPS - these at least compile
      with minimal configurations.
      
      This will affect all archs.  Mostly the changes should be relatively easy.
      Take do_IRQ(), store the regs pointer at the beginning, saving the old one:
      
      	struct pt_regs *old_regs = set_irq_regs(regs);
      
      And put the old one back at the end:
      
      	set_irq_regs(old_regs);
      
      Don't pass regs through to generic_handle_irq() or __do_IRQ().
      
      In timer_interrupt(), this sort of change will be necessary:
      
      	-	update_process_times(user_mode(regs));
      	-	profile_tick(CPU_PROFILING, regs);
      	+	update_process_times(user_mode(get_irq_regs()));
      	+	profile_tick(CPU_PROFILING);
      
      I'd like to move update_process_times()'s use of get_irq_regs() into itself,
      except that i386, alone of the archs, uses something other than user_mode().
      
      Some notes on the interrupt handling in the drivers:
      
       (*) input_dev() is now gone entirely.  The regs pointer is no longer stored in
           the input_dev struct.
      
       (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking.  It does
           something different depending on whether it's been supplied with a regs
           pointer or not.
      
       (*) Various IRQ handler function pointers have been moved to type
           irq_handler_t.
      Signed-Off-By: NDavid Howells <dhowells@redhat.com>
      (cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
      7d12e780
  33. 26 9月, 2006 1 次提交