1. 09 10月, 2006 4 次提交
    • E
      [PATCH] x86_64 irq: Allocate a vector across all cpus for genapic_flat. · c7111c13
      Eric W. Biederman 提交于
      The problem we can't take advantage of lowest priority delivery mode if
      the vectors are allocated for only one cpu at a time.  Nor can we work
      around hardware that assumes lowest priority delivery mode is always
      used with several cpus.
      
      So this patch introduces the concept of a vector_allocation_domain.  A
      set of cpus that will receive an irq on the same vector.  Currently the
      code for implementing this is placed in the genapic structure so we can
      vary this depending on how we are using the io_apics.
      
      This allows us to restore the previous behaviour of genapic_flat without
      removing the benefits of having separate vector allocation for large
      machines.
      
      This should also fix the problem report where a hyperthreaded cpu was
      receving the irq on the wrong hyperthread when in logical delivery mode
      because the previous behaviour is restored.
      
      This patch properly records our allocation of the first 16 irqs to the
      first 16 available vectors on all cpus.  This should be fine but it may
      run into problems with multiple interrupts at the same interrupt level.
      Except for some badly maintained comments in the code and the behaviour
      of the interrupt allocator I have no real understanding of that problem.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Acked-by: NMuli Ben-Yehuda <muli@il.ibm.com>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      c7111c13
    • E
      [PATCH] i386/x86_64: Remove global IO_APIC_VECTOR · b940d22d
      Eric W. Biederman 提交于
      Which vector an irq is assigned to now varies dynamically and is
      not needed outside of io_apic.c.  So remove the possibility
      of accessing the information outside of io_apic.c and remove
      the silly macro that makes looking for users of irq_vector
      difficult.
      
      The fact this compiles ensures there aren't any more pieces
      of the old CONFIG_PCI_MSI weirdness that I failed to remove.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      b940d22d
    • E
      [PATCH] i386/x86_64: FIX pci_enable_irq to set dev->irq to the irq number · 7da5d406
      Eric W. Biederman 提交于
      In commit ace80ab7 I removed the weird
      logic that used the vector number as the irq number when MSI was
      defined.  However pci_enable_irq was using a different test in the
      io_apic_assign_irqs path and I missed it :(
      
      This patch removes the wrong code so no one hits this problem.
      
      This code is only active when a specific set of boot command line
      parameters is specified which likely explains why no one has notices
      this earlier.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      7da5d406
    • T
      [PATCH] NFS: Fix typo in nfs_get_client() · ca4aa096
      Trond Myklebust 提交于
      NFS_CS_INITING > NFS_CS_READY, so instead of waiting for the structure to
      get initialised, we currently immediately jump out of the loop without ever
      sleeping.
      Signed-off-by: NTrond Myklebust <Trond.Myklebust@netapp.com>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      ca4aa096
  2. 08 10月, 2006 12 次提交
  3. 07 10月, 2006 24 次提交