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  1. 26 4月, 2013 3 次提交
    • D
      drm/i915: move dp clock computations to encoder->compute_config · c6bb3538
      由 Daniel Vetter 提交于 
      With the exception of hsw, which has dedicated DP clocks which run at
the fixed frequency already, and vlv, which doesn't have optmized
pre-defined dp clock parameters (yet).

v2: Ville asked me to elaborate a bit more on the longer-term goals
wrt dpll settings computation:

So ultimately my idea is that in the compute config stage first the crtc
code puts the default platform pll limits into the pipe_config. Then
encoders can either overwrite that limit structure with their own special
stuff (mostly for lvds madness). Or they can pick some or all of the
parameters (e.g. just the p2 switchover on hdmi, or all the clock
parameters for dp/sdvo tv).

Once that's done then the generic crtc code can fill out any missing bits
(using the find_best_pll code) and then try to assign which pll to use (if
it's a platform with shared plls). In the end the modeset could should
simply write the computed stuff into registers and never be able to fail.

Of course there's still a lot of data to be moved into pipe_config to make
this all happen, hence some of the temporary ugliness.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v1)
Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c6bb3538
    • D
      drm/i915: shovel compute clock into crtc->config.dpll on ilk · 7429e9d4
      由 Daniel Vetter 提交于 
      This was somehow lost in the pipe_config->dpll introduction in

commit f47709a9
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Mar 28 10:42:02 2013 +0100

    drm/i915: create pipe_config->dpll for clock state

While at it, extract a few small helpers for common computations.

v2: Use the newly added helpers more thanks to Ville's trick to
typedef the legacy intel_clock_t as the new-world struct dpll.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      7429e9d4
    • D
      drm/i915: consolidate pch pll computations a bit · cbbab5bd
      由 Daniel Vetter 提交于 
      We need the dpll/fp/fp2 values only when we need a pch pll. So move
them together with the code to acquire such a pll.
Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      cbbab5bd
  3. 25 4月, 2013 7 次提交
  5. 24 4月, 2013 6 次提交
  7. 23 4月, 2013 9 次提交
  9. 22 4月, 2013 3 次提交
  11. 20 4月, 2013 1 次提交
  13. 19 4月, 2013 11 次提交