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  1. 22 3月, 2009 1 次提交
  3. 14 3月, 2009 1 次提交
  5. 28 10月, 2008 2 次提交
  7. 21 10月, 2008 1 次提交
  9. 09 10月, 2008 1 次提交
  11. 03 10月, 2008 1 次提交
  13. 30 9月, 2008 1 次提交
  15. 27 8月, 2008 1 次提交
  17. 15 7月, 2008 1 次提交
  19. 09 7月, 2008 1 次提交
    • G
      ibm_newemac: Parameterize EMAC Multicast Match Handling · 05781ccd
      由 Grant Erickson 提交于 
      Various instances of the EMAC core have varying: 1) number of address
match slots, 2) width of the registers for handling address match slots,
3) number of registers for handling address match slots and 4) base
offset for those registers.

As the driver stands today, it assumes that all EMACs have 4 IAHT and
GAHT 32-bit registers, starting at offset 0x30 from the register base,
with only 16-bits of each used for a total of 64 match slots.

The 405EX(r) and 460EX now use the EMAC4SYNC core rather than the EMAC4
core. This core has 8 IAHT and GAHT registers, starting at offset 0x80
from the register base, with ALL 32-bits of each used for a total of
256 match slots.

This adds a new compatible device tree entry "emac4sync" and a new,
related feature flag "EMAC_FTR_EMAC4SYNC" along with a series of macros
and inlines which supply the appropriate parameterized value based on
the presence or absence of the EMAC4SYNC feature.

The code has further been reworked where appropriate to use those macros
and inlines.

In addition, the register size passed to ioremap is now taken from the
device tree:

	c4 for EMAC4SYNC cores
	74 for EMAC4 cores
	70 for EMAC cores

rather than sizeof (emac_regs).

Finally, the device trees have been updated with the appropriate compatible
entries and resource sizes.

This has been tested on an AMCC Haleakala board such that: 1) inbound
ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11
and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from
'haleakala.local' to those same systems in the '.local' domain via MDNS
now work.
Signed-off-by: NGrant Erickson <gerickson@nuovations.com>
Acked-by: NJeff Garzik <jgarzik@pobox.com>
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      05781ccd
  21. 04 7月, 2008 2 次提交
  23. 25 4月, 2008 6 次提交
  25. 29 3月, 2008 1 次提交
  27. 17 3月, 2008 1 次提交
    • P
      NEWEMAC: fix support for pause packets · 4373c932
      由 Pravin M. Bathija 提交于 
      Problem Description and Fix
---------------------------
When a pause packet(with destination as reserved Multicast address) is
received by the EMAC hardware to control the flow of frames being
transmitted by it, it is dropped by the hardware unless the reserved
Multicast address is hashed in to the GAHT[1-4] registers. This code fix
adds the default reserved multicast address to the GAHT[1-4] registers
in the EMAC(s) present on the chip. The flow control with Pause packets
will only work if the following register bits are programmed in EMAC:
EMACx_MR1[APP] = 1
EMACx_RMR[BAE] = 1
EMACx_RMR[MAE] = 1

Behavior that may be observed in a running system
-------------------------------------------------
A host transferring data from a PPC based system may send a Pause packet
to the PPC EMAC requesting it to slow down the flow of packets. If the
default reserved multicast MAC address is not programmed into the
GAHT[1-4] registers this Pause packet will be dropped by PPC EMAC and no
Flow Control will be done.
Signed-off-by: NPravin M. Bathija <pbathija@amcc.com>
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      4373c932
  29. 29 1月, 2008 1 次提交
  31. 17 1月, 2008 1 次提交
  33. 08 12月, 2007 6 次提交
  35. 24 11月, 2007 1 次提交
  37. 15 10月, 2007 2 次提交
  39. 11 10月, 2007 3 次提交
    • R
      ibm_new_emac: Nuke SET_MODULE_OWNER() use · 61ba5b3c
      由 Roland Dreier 提交于 
      Signed-off-by: NRoland Dreier <rolandd@cisco.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      61ba5b3c
    • V
      Fix typo in new EMAC driver. · 07c2c76e
      由 vbarshak@ru.mvista.com 提交于 
      Fix an obvious typo in emac_xmit_finish.
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      07c2c76e
    • D
      Device tree aware EMAC driver · 1d3bb996
      由 David Gibson 提交于 
      Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs.  The
same ASIC is also found in the Axon bridge chip.  This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.

This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac).  The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).

This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging.  Specifically:
	- Should be adjusted to properly use the dma mapping API.
Axon needs this.
	- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices.  The dependencies here between
EMAC, MAL, ZMII etc. make this complicated.  At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      1d3bb996