This patch enables Spansion S25FL512SAGMFIG11 chip on QSPI,
Add support for the QSPI interface on Lager.
Signed-off-by: NHiep Cao Minh <cm-hiep@jinso.co.jp>
Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Hook in shmobile_init_late() on Lager V2. This enables some PM
related things like CPUIdle and Suspend-to-RAM.

With this patch applied it is possible to use Suspend-to-RAM:
# echo enabled > /sys/class/tty/ttySC6/power/wakeup
# echo mem > /sys/power/state
(wake by sending a character on the serial console)
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Enable wakeup for the GPIO keys on the Lager board.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

In R-Car GPIO hardware block, 'chattering removal' feature can be
enabled on GPIO-n-[3:0] pins, but it's not supported on rest of pins
GPIO-n-[31:4].

Set an appropriate debounce interval, instead.  We could confirm that
spurious/unnecessary GPIO interrupts are prevented by this settings.
Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

sh_mmcif driver doesn't care resource name.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Move arch timer workaround code and boot mode pin
handling from setup-r8a7790.c to setup-rcar-gen2.c.

With this in place the same code can be used on
other R-Car Generation 2 devices such as r8a7791.
Signed-off-by: NMagnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au trivial rebase of board-lager.c
 for introduction of lager_add_standard_devices()]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Move arch timer workaround code and boot mode pin
handling from setup-r8a7790.c to setup-rcar-gen2.c.

With this in place the same code can be used on
other R-Car Generation 2 devices such as r8a7791.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add r8a7790 SMP support using the shared APMU code. To enable
SMP the r8a7790 specific DTS needs to be updated to include
CPU cores, and this is happening in a separate patch.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

MMCIF on r8a7790 doesn't support Command Completion Signal, but it does
implement a CE_CLK_CTRL2 register. Platform parameters have to be added to
account for these features on lager.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The DU device erroneously receives the DU resources array as platform
data instead of the DU platform data structure. Fix it.

This problem was introduced by f631fa0 ("ARM: shmobile: lager: Add Display
Unit support").
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Only the VGA output is currently supported.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Platform data and resources for Lager devices are kmemdup()ed when the
corresponding devices are registered and can thus be declared as const.
Do so.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Currently on the Lager board NFS timeouts/delays are seen when booting.  That
turned out to happen because the SoC's ETH_LINK signal turns on and off after
each packet.  It is connected to Micrel KSZ8041 PHY's LED0 signal. Ether LEDs
on the Lager board are named LINK and ACTIVE which corresponds to non-default
01 setting of the PHY control register 1 bits 14-15. The 'sh_eth' driver resets
the PHY when opening the network device, so we have to set the mentioned bits
back to 01 from the default 00 value which causes bouncing of ETH_LINK.  That
can be achieved using the PHY platform fixup mechanism if we also modify the
driver to use it..
Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Rename r8a7790_init_delay() into r8a7790_init_early()
to make the function name show that more than just
delay setup may happen in the future.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

As of 8d3214c4 ("sh_eth: remove 'register_type' field from 'struct
sh_eth_plat_data'") is is no longer necessary or correct to use the
'register_type' field from 'struct sh_eth_plat_data' and doing so results
in a build error.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds missing __initdata to driver data/resource
which are used from platform_device_register_xxx()
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

When the gpio-keys device is registered using
platform_device_register_data() the platform data argument,
lager_keys_pdata is duplicated and thus should be marked as __initdata
to avoid wasting memory. However, this is not true of gpio_buttons,
a reference to it rather than its value is duplicated when lager_keys_pdata
is duplicated.

This avoids accessing freed memory if gpio-key events occur
after unused kernel memory is freed late in the kernel's boot.

This but was added when support for gpio-keys was added to lager
in c3842e4f
("ARM: shmobile: lager: support GPIO switches") which was included
in v3.11-rc1.
Tested-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add support for the MMCIF1 interface on Lager.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Update the r8a7790 code to allow using other
timers than Arch timer for clock events.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Remove redundant irqchip_init() callback. The default case
of NULL will result in invoking irqchip_init() anyway.
Signed-off-by: NMagnus Damm <damm@opensource.se>
[ horms+renesas@verge.net.au: Trimmed patch to remove portion
  that updates the r8a7790 SoC and altered the subject to
  use the same format as the patch that updates the r8a7790. ]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The lager board has pins 1 - 4 of SW2 wired up to GPIO pins.
This patch allows access to those pins as KEYS 1 - 4 using
gpio-keys.
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The board has 3 LEDs connected to GPIOs. Add a led-gpio device to
support them.

Based on "ARM: shmobile: marzen: Add GPIO LEDs" by Laurent Pinchart.

Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Initialize r8a7790 pinmuxing and register mappings for the two debug
serial ports.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Use the r8a7790 timer init function on Lager
to make sure the architected timer is started
regardless of boot loader setting.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Lager base board support making use of 2 GiB of memory,
the r8a7790 SoC with the SCIF0 serial port and CA15 with
ARM architected timer.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add basic Bock-W board support

More devices will be added on top of this patch after
PICNTRL and clock framework are in better shape.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add initial support for the R8A7778 R-Car M1A SoC.
No static virtual mappings are used, all the components
make use of ioremap().
DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.

It is based on v1.0 datasheet
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

In devices using ehci-sh, initialization of the PHY may be necessary.
This adds platform data to ehci-sh and provide function to initialize PHY.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Shimoda, Yoshihiro <yoshihiro.shimoda.uh@renesas.com>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Current sh-hspi had used platform-specific speed.
This patch remove it, and use spi_transfer specific speed.
It removes unnecessary flags from struct sh_hspi_info,
but struct sh_hspi_info is still exist, since sh-hspi needs
platform info in the future.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

This patch adds SuperH HSPI driver.
It is still prototype driver, but has enough function at this point.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Now that most platforms don't need disable_fiq and arch_ret_to_user
macros, we can remove the empty macros or empty entry-macro.S files.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NJamie Iles <jamie@jamieiles.com>
Acked-by: NNicolas Pitre <nico@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NRyan Mallon <rmallon@gmail.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>

Even when CONFIG_MULTI_IRQ_HANDLER is selected, the core code
requires the arch_irq_handler_default macro to be defined as
a fallback.

It turns out nobody is using that particular feature as both PXA
and shmobile have all their machine descriptors populated with
the interrupt handler, leaving unused code (or empty macros) in
their entry-macro.S file just to be able to compile entry-armv.S.

Make CONFIG_MULTI_IRQ_HANDLER exclusive wrt arch_irq_handler_default,
which allows to remove one test from the hot path. Also cleanup both
PXA and shmobile entry-macro.S.

Cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: NNicolas Pitre <nico@linaro.org>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Tested-by: NJamie Iles <jamie@jamieiles.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

PPI handling is a bit of an odd beast. It uses its own low level
handling code and is hardwired to the local timers (hence lacking
a registration interface).

Instead, switch the low handling to the normal SPI handling code.
PPIs are handled by the handle_percpu_devid_irq flow.

This also allows the removal of some duplicated code.

Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Tested-by: NDavid Brown <davidb@codeaurora.org>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Remove now unused IRQ demux code. All R-Mobile and
SH-Mobile processors should register IRQ demux
handlers during run-time.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Fix interrupt priority level handling on SH-Mobile ARM.

SH-Mobile ARM platforms using multiple interrupt priority
levels need this patch to fix a potential dead lock that
may occur if multiple interrupts with different levels
are pending simultaneously.

The default INTC configuration is to use the same priority
level for all interrupts, so this issue does not trigger by
default. It is however common for board code to override the
interrupt priority for certain interrupt sources depending
on the application. Without this fix such boards may lock up.

In detail, this patch updates the INTC code in entry-macro.S
to make sure that the INTLVLA register gets set as expected.

To trigger this bug modify the board specific code to adjust
the interrupt priority level for the ethernet chip. After
changing the priority level simply use flood ping to drown
the board with interrupts.

This patch applies to INTCA-based processors such as sh7372,
sh7377 and sh7372. GIC-based processors are not affected.

Suitable for v2.6.37-rc and stable from v2.6.34 to v2.6.36.

Cc: stable@kernel.org
Signed-off-by: NMagnus Damm <damm@opensource.se>
Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Presently the entry macros are all globbed together, this simply splits
them out in to their insular variants. Future work such as the GIC
generalization will replace some of these and tidy the abstraction up
further.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds initial support for Renesas SH-Mobile AG5.

At this point the AG5 CPU support is limited to the ARM
core, SCIF serial and a CMT timer together with L2 cache
and the GIC. The AG5EVM board also supports Ethernet.

Future patches will add support for GPIO, INTCS, CPGA
and platform data / driver updates for devices such as
IIC, LCDC, FSI, KEYSC, CEU and SDHI among others.

The code in entry-macro.S will be cleaned up when the
ARM IRQ demux code improvements have been merged.

Depends on the AG5EVM mach-type recently registered but
not yet present in arch/arm/tools/mach-types.

As the AG5EVM board comes with 512MiB memory it is
recommended to turn on HIGHMEM.

Many thanks to Yoshii-san for initial bring up.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Optimize the SH-Mobile interrupt assembly macros to avoid
reloading the INTFLGA register address in case of multiple
pending interrupts. Kindly pointed out by Russell King.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds preliminary support for the SH-Mobile G-series.

The SH-Mobile G-series is a series of ARM/SH multi-core CPUs that aside
from the ARM MPU are primarily composed of existing SH IP blocks.

This includes initial support for the SH7367 (SH-Mobile G3) CPU and
the G3EVM reference board.

Only timer, serial console, and NOR flash are supported at this point.
Patches for the interrupt controller, pinmux support, clock framework
and runtime pm will be submitted as feature patches on top of this.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>