- 16 11月, 2015 2 次提交
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由 Alexandre Belloni 提交于
The clocks group properties and the clock@0 node are useless, remove them to avoid copy pasting in future device trees. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Sudeep Holla 提交于
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to check for/support the legacy "gpio-key,wakeup" boolean property to enable gpio buttons as wakeup source, "wakeup-source" is the new standard binding. This patch replaces the legacy "gpio-key,wakeup" with the unified "wakeup-source" property in order to avoid any futher copy-paste duplication. Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 21 9月, 2015 1 次提交
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由 Josh Wu 提交于
On at91sam9x5ek/at91sam9m10g45ek/sama5d3xek boards, we use the parallel connection for ov2640. So we must set the hsync/vsync property (1 means active high). Otherwise, the connection would be seen as BT.656 or BT.1120. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 30 7月, 2015 1 次提交
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由 Josh Wu 提交于
First we group the isi data pins, and for now we only use 0~7 data pins with HSYNC and VSYNC. Also add the link for atmel-isi and ov2640 sensor node. Signed-off-by: NJosh Wu <josh.wu@atmel.com> [nicolas.ferre@atmel.com: move the pinctrl properties in board .dts file] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 04 6月, 2015 1 次提交
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由 Alexandre Belloni 提交于
Use stdout-path to specify the console and remove the console argument from the kernel command line. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 19 11月, 2014 1 次提交
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由 Boris Brezillon 提交于
Enable the RTT and GPBR devices and specify the general purpose register used to store the current time. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 19 9月, 2014 1 次提交
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由 Erik van Luijk 提交于
Add rtc node to both the at91sam9g45 SoC family and the at91sam9m10g45ek board. Signed-off-by: NErik van Luijk <evanluijk@interact.nl> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 10 7月, 2014 1 次提交
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由 Alexandre Belloni 提交于
Define at91sam9m10g45ek main and slow crystals frequencies. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 19 4月, 2014 2 次提交
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由 Alexandre Belloni 提交于
The real polarity of the LEDs is inversed. The led is between 3.3v and the PWM. It was working before because the driver was getting the duty cycle calculation wrong. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 20 12月, 2013 1 次提交
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由 Bo Shen 提交于
The d6 and d7 is connected to PWM, we can use PWM to control it, so switch to PWM leds. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 09 12月, 2013 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 15 6月, 2013 1 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Tested-by: NBo Shen <voice.shen@atmel.com>
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- 01 6月, 2013 1 次提交
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由 Wenyou Yang 提交于
boards include: at91sam9263ek, at91sam9g20ek, at91sam9m10g45ek, at91sam9n12ek, at91sam9x5ek Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Tested-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 17 5月, 2013 3 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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to prepare the switch to the macro. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 24 4月, 2013 1 次提交
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由 Richard Genoud 提交于
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> [wenyou.yang@atmel.com: added spi nodes for the sam9263ek, sam9g20ek, sam9m10g45ek and sam9n12ek boards] [wenyou.yang@atmel.com: submit the patch] Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 21 3月, 2013 1 次提交
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由 Nicolas Ferre 提交于
Gpio-keys nodes are not using the "reg" property in their sub nodes. So, there is no need to define #address-cells and #size-cells properties in gpio-keys nodes: we remove them. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 20 11月, 2012 2 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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由 Ludovic Desroches 提交于
Add mci controller nodes to atmel boards. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 19 11月, 2012 2 次提交
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as we just use the rts and not the rts & cts for rs485 Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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USART are the full pin uart DBGU the debug Unit UART the two pin uart Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 13 10月, 2012 1 次提交
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Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 12 9月, 2012 1 次提交
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由 Ludovic Desroches 提交于
Still use i2c-gpio on boards which have a SoC with a TWI IP which doesn't have clock stretching in transmission mode. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
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- 05 4月, 2012 2 次提交
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由 Ludovic Desroches 提交于
Because of the inclusion of skeleton.dtsi, the memory node is named "memory" we where not modifying the already included one but creating a new one. It caused bad memory node detection during early_init_dt_scan_memory() so we modify them. Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: devicetree-discuss@lists.ozlabs.org
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由 Nicolas Ferre 提交于
Change vbus gpio configuration in .dts files to switch to active low configuration. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: stable <stable@vger.kernel.org>
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- 16 3月, 2012 2 次提交
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make the ECHI depends on ARCH_AT91 Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: devicetree-discuss@lists.ozlabs.org
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: devicetree-discuss@lists.ozlabs.org
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- 15 3月, 2012 2 次提交
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Specified the main Oscillator via clock binding. This will allow to do not hardcode it anymore in the DT board at 12MHz. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Use a local copy of board informatin and fill with DT data. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
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- 01 3月, 2012 2 次提交
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Use the gpio for d7 as we do not support yet the pwm led via dt. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 16 12月, 2011 1 次提交
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由 Nicolas Ferre 提交于
Add the Cadence macb ethernet controller in at91sam9g45 and at91sam9g20 .dtsi and enable it in at91sam9m10g45ek and usb_a9g20 board device tree file. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 25 10月, 2011 1 次提交
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由 Nicolas Ferre 提交于
Create a new device tree source file for Atmel at91sam9g45 SoC family. The Evaluation Kit at91sam9m10g45ek includes it. This first basic support will be populated as drivers and boards will be converted to device tree. Contains serial, dma and interrupt controllers. The generic board file still takes advantage of platform data for early serial init. As we need a storage media and the NAND flash driver is not converted to DT yet, we keep old initialization for it. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com>
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