In order to safely work around anomaly 05000491, we have to execute IFLUSH
from L1 instruction sram.  The trouble with multi-core systems is that all
L1 sram is visible only to the active core.  So we can't just place the
functions into L1 and call it directly.  We need to setup a jump table and
place the entry point in external memory.  This will call the right func
based on the active core.

In the process, convert from the manual relocation of a small bit of code
into Core B's L1 to the more general framework we already have in place
for loading arbitrary pieces of code into L1.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Re-use some of the existing cpu hotplugging code in the process.
Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

We need to place icache flush funcs into L1 inst sram to work around a
hardware anomaly.  But this currently breaks SMP support as the L1 inst
sram is per-core and cannot be called directly.  So in preparation for
making that work, split the two options.

Further, split out the SMP depend so that we can allow some for SMP.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The smp_processor_id() API requires that preempt be disabled when calling
it, so make sure it is when we go to send messages to other processors.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Defer bfin_setup_caches(cpu) to avoid unexpected faults due to the cpu
state not yet being fully initialized.
Signed-off-by: Nsteven miao <realmz6@gmail.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Common code checks the alignment of some of the variables and calls BUG()
if they aren't page aligned.
Signed-off-by: Nsteven miao <realmz6@gmail.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

We use these insns when testing, so enable them by default for all
of our development boards.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Common code no longer defines this, so stop using it.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The board doesn't actually have a pin hooked up to do card detection,
so punt the code for it.
Signed-off-by: NAndreas Schallenberg <Andreas.Schallenberg@3alitydigital.de>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NAaron Wu <aaronwu06@gmail.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The BF54x lacks dedicated DMA channels for the UART peripherals and need
to be muxed between others.  So add a kconfig option so people can select
which channels the UARTs will use so they can pick between SPORTs and the
less commonly used EPPI/PIXC peripherals.
Signed-off-by: Nsteven miao <realmz6@gmail.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Since coreb_trampoline_start() calls coreb_start(), they need to be in
the same section.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Recent feedback from design says we need three NOPs in the hardware loop.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Some devices will use the outs* funcs with a length of zero, so make sure
we do not write any data in that case.
Reported-by: NGilbert Inho <gneny@edevice.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The RX lock is used to protect the RX buffer from concurrent access in DMA
mode between the timer and RX interrupt routines.  It is independent from
the uart lock which is used to protect the TX buffer.  It is possible for
a uart TX transfer to be started up from the RX interrupt handler if low
latency is enabled.  So we need to split the locks to avoid deadlocking in
this situation.

In PIO mode, the RX lock is not necessary because the handle_simple_irq
and handle_level_irq functions ensure driver interrupt handlers are called
once on one core.

And now that the RX path has its own lock, the TX interrupt has nothing to
do with the RX path, so disabling it at the same time.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

xtime_update() takes the xtime_lock itself.
Signed-off-by: NTorben Hohn <torbenh@gmx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: johnstul@us.ibm.com
Cc: hch@infradead.org
Cc: yong.zhang0@gmail.com
LKML-Reference: <20110127145931.23248.33917.stgit@localhost>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Currently percpu readmostly subsection may share cachelines with other
percpu subsections which may result in unnecessary cacheline bounce
and performance degradation.

This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()
linker macros, makes each arch linker scripts specify its cacheline
size and use it to align percpu subsections.

This is based on Shaohua's x86 only patch.
Signed-off-by: NTejun Heo <tj@kernel.org>
Cc: Shaohua Li <shaohua.li@intel.com>

No functional change.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: Mike Frysinger <vapier@gentoo.org>

All architectures are finally converted. Remove the cruft.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Greg Ungerer <gerg@uclinux.org>
Cc: Michal Simek <monstr@monstr.eu>
Acked-by: NDavid Howells <dhowells@redhat.com>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Chen Liqin <liqin.chen@sunplusct.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Jeff Dike <jdike@addtoit.com>

The meaning of CONFIG_EMBEDDED has long since been obsoleted; the option
is used to configure any non-standard kernel with a much larger scope than
only small devices.

This patch renames the option to CONFIG_EXPERT in init/Kconfig and fixes
references to the option throughout the kernel.  A new CONFIG_EMBEDDED
option is added that automatically selects CONFIG_EXPERT when enabled and
can be used in the future to isolate options that should only be
considered for embedded systems (RISC architectures, SLOB, etc).

Calling the option "EXPERT" more accurately represents its intention: only
expert users who understand the impact of the configuration changes they
are making should enable it.
Reviewed-by: NIngo Molnar <mingo@elte.hu>
Acked-by: NDavid Woodhouse <david.woodhouse@intel.com>
Signed-off-by: NDavid Rientjes <rientjes@google.com>
Cc: Greg KH <gregkh@suse.de>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Robin Holt <holt@sgi.com>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Encoding the cpu family name apparently confuses people when they try to
boot an image on a sub-variant, so encode the specific cpu name and the
silicon rev instead.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When unmasking a GPIO interrupt on a BF54x part, the code will implicitly
ack any pending interrupts.  This is not what unmasking should do and can
cause people to miss interrupts from their devices, so punt the code.
Reported-by: NRutger Hofman <rutger@cs.vu.nl>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

If there was an error in the lower free functions, we need to pass that
back up so the calling process is able to check things.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NAndreas Schallenberg <Andreas.Schallenberg@3alitydigital.de>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

On bf518-ezbrd with DSA Ethernet switch enabled, on chip MAC is
connecting to phy at address 3.  If allowing the netdevice framework to
probe both 3 phys of the switch when registering MAC phy, phy at address
1 is checked for link active status other than phy at address 3.  If
connecting a cable to port 2 and leave port 1 open, link status in phy
2 and 3 are online, while that in phy 1 is offline.  So, the phy layer
sets wrong offline status to net device on port 3.  In this case, no data
can be transferred via ethernet port 2.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Common code now invokes the linker directly which causes build failures
when using an FDPIC toolchain.  So move the emulation setting out of the
module-specific LDFLAGS and into the common LDFLAGS.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

We check its value at runtime, so we want to avoid garbage across runs.
Signed-off-by: NVivi Li <vivi.li@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Otherwise, gdb continue operation after a breakpoint is hit may trap
into endless breakpoint.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When ADEOS and kgdb are both enabled, single step in linux kernel may be
scheduled to Xenomai core after return from interrupt handlers.  This
blocks gdb continue operation after a break point is hit.  So, disable
interrupt when running gdb single step.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When run kgdb testing, it looks like coreb hangs in single step or trap
exception without handling anomaly 05000257 properly on bf561 v0.5.  But,
the anomaly list says it apply to bf561 v0.4 and bellow.  Apply its work
around to 0.5 temporarily until the behavior and the root cause can be
confirmed by the hardware team.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The low level assembly needs to use the pseudo_long_call helper so that
we use the right call insn when doing kernel XIP.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

KGDB single step in SMP kernel may hang forever in flushinv without a
CSYNC ahead.  This is because the core internal write buffers need to
be flushed before invalidating the data cache to make sure the insn
fetch is not out of sync.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The SPORT/UART driver doesn't use the secondary channel pins, so don't
try and request them thus keeping other drivers from using them.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

platfrom -> platform

This changes a struct name. The related code is conditionally
compiled and won't work because the include file linux/gpio-decoder.h
is missing, so removing this code would be an even better solution.

If the missing include file is added, it must fix the spelling, too.
Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When using an uncached DMA region less than 1 MiB, we try to mask off
the whole last 1 MiB for it.  Unfortunately, this fails as we forgot
to subtract one from the calculated mask, leading to the region still
be marked as cacheable.
Reported-by: NAndrew Rook <andrew.rook@speakerbus.co.uk>
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Since linux-2.6.31, the kernel suspend framework will do disable_irq/enable_irq,
so save/restore irq in standby and suspend to mem callback should be dropped.
Otherwise the common code notices things are enabled and complains.
Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>