1. 23 8月, 2011 2 次提交
    • F
      usb: Introduce DesignWare USB3 DRD Driver · 72246da4
      Felipe Balbi 提交于
      The DesignWare USB3 is a highly
      configurable IP Core which can be
      instantiated as Dual-Role Device (DRD),
      Peripheral Only and Host Only (XHCI)
      configurations.
      
      Several other parameters can be configured
      like amount of FIFO space, amount of TX and
      RX endpoints, amount of Host Interrupters,
      etc.
      
      The current driver has been validated with
      a virtual model of version 1.73a of that core
      and with an FPGA burned with version 1.83a
      of the DRD core. We have support for PCIe
      bus, which is used on FPGA prototyping, and
      for the OMAP5, more adaptation (or glue)
      layers can be easily added and the driver
      is half prepared to handle any possible
      configuration the HW engineer has chosen
      considering we have the information on
      one of the GHWPARAMS registers to do
      runtime checking of certain features.
      
      More runtime checks can, and should, be added
      in order to make this driver even more flexible
      with regards to number of endpoints, FIFO sizes,
      transfer types, etc.
      
      While this supports only the device side, for
      now, we will add support for Host side (xHCI -
      see the updated series Sebastian has sent [1])
      and OTG after we have it all stabilized.
      
      [1] http://marc.info/?l=linux-usb&m=131341992020339&w=2Signed-off-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      72246da4
    • T
      USB: pxa168: Add onchip USB host controller support · 3abd7f68
      Tanmay Upadhyay 提交于
      - Add EHCI Host controller driver
      - Add wrapper that creates resources for host controller driver
      
      v2 - Call clk_put() after clk_disable() in probe function
      Signed-off-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      3abd7f68
  2. 09 7月, 2011 1 次提交
  3. 02 7月, 2011 1 次提交
    • F
      usb: gadget: allow multiple gadgets to be built · 193ab2a6
      Felipe Balbi 提交于
      now that we have the udc class, we can allow
      multiple gadget controller drivers to be
      compiled as modules. This will allow for
      distro-like kernels for embedded devices.
      
      With this patch, I managed to build an x86
      kernel with support for many of the controllers
      enabled:
      
      CONFIG_USB_FUSB300=m
      CONFIG_USB_R8A66597=m
      CONFIG_USB_M66592=m
      CONFIG_USB_AMD5536UDC=m
      CONFIG_USB_CI13XXX_PCI=m
      CONFIG_USB_NET2272=m
      CONFIG_USB_NET2280=m
      CONFIG_USB_GOKU=m
      CONFIG_USB_LANGWELL=m
      CONFIG_USB_EG20T=m
      
      Also an ARM kernel with support for many controllers:
      
      CONFIG_USB_FUSB300=m
      CONFIG_USB_OMAP=m
      CONFIG_USB_R8A66597=m
      CONFIG_USB_GADGET_MUSB_HDRC=m
      CONFIG_USB_M66592=m
      CONFIG_USB_NET2272=m
      CONFIG_USB_DUMMY_HCD=m
      
      The next step would be to get rid of the
      direct access to arch/ and mach/ directories
      on some gadget controllers so that we can
      build all of them without depending on their
      respective ARCH_* symbols.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      193ab2a6
  4. 04 5月, 2011 1 次提交
  5. 14 4月, 2011 3 次提交
  6. 25 1月, 2011 1 次提交
  7. 11 12月, 2010 1 次提交
  8. 01 12月, 2010 1 次提交
  9. 29 11月, 2010 1 次提交
  10. 17 11月, 2010 1 次提交
  11. 11 11月, 2010 1 次提交
  12. 02 11月, 2010 1 次提交
  13. 23 10月, 2010 1 次提交
    • A
      USB: add USB EHCI support for MPC5121 SoC · 230f7ede
      Anatolij Gustschin 提交于
      Extends FSL EHCI platform driver glue layer to support
      MPC5121 USB controllers. MPC5121 Rev 2.0 silicon EHCI
      registers are in big endian format. The appropriate flags
      are set using the information in the platform data structure.
      MPC83xx system interface registers are not available on
      MPC512x, so the access to these registers is isolated in
      MPC512x case. Furthermore the USB controller clocks
      must be enabled before 512x register accesses which is
      done by providing platform specific init callback.
      
      The MPC512x internal USB PHY doesn't provide supply voltage.
      For boards using different power switches allow specifying
      DRVVBUS and PWR_FAULT signal polarity of the MPC5121 internal
      PHY using "fsl,invert-drvvbus" and "fsl,invert-pwr-fault"
      properties in the device tree USB nodes. Adds documentation
      for this new device tree bindings.
      Signed-off-by: NAnatolij Gustschin <agust@denx.de>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      230f7ede
  14. 05 8月, 2010 2 次提交
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  31. 18 7月, 2007 1 次提交