- 09 5月, 2012 1 次提交
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由 Andrew Lunn 提交于
Some orion platforms can gate the XOR driver clock. If the clock exisits, unable/disable it as appropriate. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NJamie Lentin <jm@lentin.co.uk> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 17 4月, 2012 1 次提交
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由 Nicolas Ferre 提交于
Remove SoC dependency and make it generic for every Atmel ARM AT91. That will allow to select this driver for newer chips. Keep dependency on AT91 because of the use of an header file located in include/mach directory. Modify the comment to reflect this. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 06 4月, 2012 4 次提交
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由 Dave Jiang 提交于
This is the fallout from adding memcpy alignment workaround for certain IOATDMA hardware. NetDMA will only use DMA engine that can handle byte align ops. Acked-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Stephen Boyd 提交于
Many users of debugfs copy the implementation of default_open() when they want to support a custom read/write function op. This leads to a proliferation of the default_open() implementation across the entire tree. Now that the common implementation has been consolidated into libfs we can replace all the users of this function with simple_open(). This replacement was done with the following semantic patch: <smpl> @ open @ identifier open_f != simple_open; identifier i, f; @@ -int open_f(struct inode *i, struct file *f) -{ ( -if (i->i_private) -f->private_data = i->i_private; | -f->private_data = i->i_private; ) -return 0; -} @ has_open depends on open @ identifier fops; identifier open.open_f; @@ struct file_operations fops = { ... -.open = open_f, +.open = simple_open, ... }; </smpl> [akpm@linux-foundation.org: checkpatch fixes] Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Dave Jiang 提交于
Silicon errata where when RAID and legacy descriptors are mixed, the legacy (memcpy and friends) operation must have alignment of 64 bytes to avoid hanging. This effects Intel Xeon C55xx, C35xx, E5-2600. Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Dave Jiang 提交于
The alloc order can be up to 16 and 1 << 16 will over flow the 16bit integer. Change the appropriate variables to 16bit to avoid overflow. Reported-by: NJim Harris <james.r.harris@intel.com> Signed-off-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 30 3月, 2012 1 次提交
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由 Russell King 提交于
The recent merge of the sa11x0 code into mainline had silent conflicts with further development of the DMA engine API, leading to build errors and warnings: drivers/net/irda/sa1100_ir.c: In function 'sa1100_irda_dma_start': drivers/net/irda/sa1100_ir.c:151: error: too few arguments to function 'chan->device->device_prep_slave_sg' drivers/dma/sa11x0-dma.c: In function 'sa11x0_dma_probe': drivers/dma/sa11x0-dma.c:950: warning: assignment from incompatible pointer type Fix these. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 3月, 2012 2 次提交
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由 Don Morris 提交于
Bug: cppcheck reported overflow in array assignment (for loop walks 0 to IOP_ADMA_NUM_SRC_TEST+2, array size is IOP_ADMA_NUM_SRC_TEST). Reported as: https://bugzilla.kernel.org/show_bug.cgi?id=42677 Test code pq_src array was grown by two elements to correspond with actual usage (IOP_ADMA_NUM_SRC_TEST+2), stack consumption was kept constant by modifying the pq_dest two element array which is only used when pq_src is referenced up to IOP_ADMA_NUM_SRC_TEST elements into the address of the new last two elements of the pq_src array. This is presumed to be the original intent but would be reliant on compilers always having pq_dest contiguous with the final element of pq_src. Note: This is a re-send of a request for review from two weeks ago. Looking for review (or shootdown), adding LKML to list for a wider audience. Thanks. Updated per review comments of Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: NDon Morris <don.morris@hp.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Vinod Koul 提交于
commit 6bd08127 "dmaengine: imx-dma: merge old dma-v1.c with imx-dma.c" removed the dependency in config for the imx dma driver, whereas it should depend on ARCH_MXS Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 27 3月, 2012 2 次提交
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由 Huang Shijie 提交于
[1] Background : The GPMI does ECC read page operation with a DMA chain consist of three DMA Command Structures. The middle one of the chain is used to enable the BCH, and read out the NAND page. The WAIT4END(wait for command end) is a comunication signal between the GPMI and MXS-DMA. [2] The current DMA code sets the WAIT4END bit at the last one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ | | set WAIT4END here This chain works fine in the mx23/mx28. [3] But in the new GPMI version (used in MX50/MX60), the WAIT4END bit should be set not only at the last DMA Command Structure, but also at the middle one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ ^ | | | | set WAIT4END here too set WAIT4END here If we do not set WAIT4END, the BCH maybe stalls in "ECC reading page" state. In the next ECC write page operation, a DMA-timeout occurs. This has been catched in the MX6Q board. [4] In order to fix the bug, rewrite the last parameter of mxs_dma_prep_slave_sg(), and use the dma_ctrl_flags: --------------------------------------------------------- DMA_PREP_INTERRUPT : append a new DMA Command Structrue. DMA_CTRL_ACK : set the WAIT4END bit for this DMA Command Structure. --------------------------------------------------------- [5] changes to the relative drivers: <1> For mxs-mmc driver, just use the new flags, do not change any logic. <2> For gpmi-nand driver, and use the new flags to set the DMA chain, especially for ecc read page. Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NHuang Shijie <b32955@freescale.com> Acked-by: NVinod Koul <vinod.koul@linux.intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Huang Shijie 提交于
Move the header to a more common place. The mxs dma engine is not only used in mx23/mx28, but also used in mx50/mx6q. It will also be used in the future chips. Rename it to mxs-dma.h, and create a new folder include/linux/fsl/ to store the Freescale's header files. change mxs-dma driver, mxs-mmc driver, gpmi-nand driver, mxs-saif driver to the new header file. Acked-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NHuang Shijie <b32955@freescale.com> Acked-by: NVinod Koul <vinod.koul@linux.intel.com> Acked-by: NChris Ball <cjb@laptop.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 26 3月, 2012 15 次提交
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由 Javier Martin 提交于
When merging DMA cookie changes a small chunk of code was dropped. This broke imx-dma driver. This patch adds this chunk again and fixes the problem. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
i.MX2 and i.MX1 chips have the possibility to do interleaved transfers with two constraints: - Only one chunk can be used (i.e. only 2D transfers are allowed). - Only 2 interleaved configurations can be applied at the same time for all channels. Since this patch adds a new resource 'slots_2d' which is shared by all the DMA channels and to avoid disgustin locking BUGs, the 'lock' member has been moved to the global 'imxdma_engine' structure. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
There were some 'pr_crit' and 'pr_debug' messages due to the initial merge. Replace them by 'dev_dbg' and 'dev_warn' to be consistent. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
These global variables are integrated into the dmaengine structure. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
Since this function is always used with 'desc' as first argument and 'desc->sg' as second argument, the latter is clearly redundant and can be removed. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
This structure was created to allow an smoothless merge but was meant to be removed. Remaining members 'hw_chaining' and 'watchdog' are moved to the channel structure. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
Use per-descriptor 'len' field to keep track of the remaining bytes instead. This goes on the direction of eventually removing the 'internal' structure. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
It makes no sense keeping an 'in_use' flag when the multiple descriptor mechanism already prevents a new DMA transfer to be issued when another one is in course. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
This member is redundant, because it is already present in descriptor structure. Removing it will make further removing of 'internal' structure easier. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
Removing this function allows moving 'ccr_to_device' and 'ccr_from_device' from internal struct to channel struct. This repesents a step forward towards removing auxiliary 'internal' structure. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
This function is only used once in the driver and uses some intermediary variables that are not needed anymore. For this reason it's been merged with 'imxdma_control'. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
This function is only used once in the driver and has a lot of checks that are not needed anymore. For this reason it's been merged with 'imxdma_enable_hw'. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
dmaengine now provides 'enum dma_transfer_direction' to properly specify DMA transfer direction. For this reason, DMA_MODE_* defines are replaced by this new type and therefore dma_mode member becomes redundant. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
Internal structure is just an auxiliary structure used for the initial merge which is meant to be gone. As data member is not use anywhere we can simply remove it. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Javier Martin 提交于
It is mainly a simple merge changing the prefix of some functions to fit the imx-dma namings. As there are no users of the old dma-v1.c api we can safely remove this file. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 24 3月, 2012 1 次提交
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由 Dan Williams 提交于
Starting with v3.2 Jonathan reports that Xen crashes loading the ioatdma driver. A debug run shows: ioatdma 0000:00:16.4: desc[0]: (0x300cc7000->0x300cc7040) cookie: 0 flags: 0x2 ctl: 0x29 (op: 0 int_en: 1 compl: 1) ... ioatdma 0000:00:16.4: ioat_get_current_completion: phys_complete: 0xcc7000 ...which shows that in this environment GFP_KERNEL memory may be backed by a 64-bit dma address. This breaks the driver's assumption that an unsigned long should be able to contain the physical address for descriptor memory. Switch to dma_addr_t which beyond being the right size, is the true type for the data i.e. an io-virtual address inidicating the engine's last processed descriptor. [stable: 3.2+] Cc: <stable@vger.kernel.org> Reported-by: NJonathan Nieder <jrnieder@gmail.com> Reported-by: NWilliam Dauchy <wdauchy@gmail.com> Tested-by: NWilliam Dauchy <wdauchy@gmail.com> Tested-by: NDave Jiang <dave.jiang@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 21 3月, 2012 3 次提交
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由 Nicolas Ferre 提交于
This patch introduces DMA_SLAVE_CONFIG to at_hdmac Atmel DMA driver. It is needed to fix a regression in the use of atmel-mci.c driver on Atmel AT91 platforms brouth by e2b35f3d: "dmaengine/dw_dmac: Fix dw_dmac user drivers to adapt to slave_config changes" We remove some parts of the private structure "at_dma_slave" and use the information provided by "struct dma_slave_config": source/destination peripheral registers and access width. AT_DMA_SLAVE_WIDTH_* values used previously are not needed anymore as we now use the standard ones. Although some conversion functions are needed to match register expected values. Some AT91 sub-architecture specific files are slightly touched by this patch but it cannot be split because it can break compilation. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Alexandre Bounine 提交于
Add context parameter to device_prep_slave_sg() and device_prep_dma_cyclic() interfaces to allow passing client/target specific information associated with the data transfer. Modify all affected DMA engine drivers. Signed-off-by: NAlexandre Bounine <alexandre.bounine@idt.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Fabio Estevam 提交于
As the SDMA controller can operate without an external firmware being loaded, treat the firmware related messages as warnings rather than errors. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 17 3月, 2012 1 次提交
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由 viresh kumar 提交于
For simple modules that contain a single amba_driver without any additional setup code then ends up being a block of duplicated boilerplate. This patch adds a new macro, module_amba_driver(), which replaces the module_init()/module_exit() registrations with template functions. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 3月, 2012 9 次提交
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由 Vinod Koul 提交于
Fixed trivial issues in drivers: drivers/dma/imx-sdma.c drivers/dma/intel_mid_dma.c drivers/dma/ioat/dma_v3.c drivers/dma/iop-adma.c drivers/dma/sirf-dma.c drivers/dma/timb_dma.c Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Vinod Koul 提交于
drivers/dma/pl330.c: In function 'pl330_control': drivers/dma/pl330.c:342: error: 'struct dma_pl330_chan' has no member named 'completed' Reported by: Jassi Brar <jassisinghbrar@gmail.com> Suggested by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Ensure all DMA engine drivers initialize their cookies in the same way, so that they all behave in a similar fashion. This means their first issued cookie will be 2 rather than 1, and will increment to INT_MAX before returning 1 and starting over. In connection with this, Dan Williams said: > Russell King wrote: > > Secondly, some DMA engine drivers initialize the dma_chan cookie to 0, > > others to 1. Is there a reason for this, or are these all buggy? > > I know that ioat and iop-adma expect 0 to mean "I have cleaned up this > descriptor and it is idle", and would break if zero was an in-flight > cookie value. The reserved usage of zero is an driver internal > concern, but I have no problem formalizing it as a reserved value. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Dan Williams said: > > Russell King wrote: > > Firstly, we have DMA_MIN_COOKIE which has value 1 - so any cookies below > > that aren't valid. That seems sane. > > > > We seem to have different behaviours: > > > > - cookie = c->cookie; > > - cookie++; > > - if (cookie < 0) > > - cookie = 1; > > - c->cookie = cookie; > > - tx->cookie = cookie; > > > > c->cookie here is initialized to zero, so the first cookie given out will > > be 1. This is how most DMA engine drivers implement this. > > > > Then we have this: > > > > cookie = chan->common.cookie; > > cookie++; > > if (cookie <= 1) > > cookie = 2; > > > > /* initialize the completed cookie to be less than > > * the most recently used cookie > > */ > > chan->common.completed_cookie = cookie - 1; > > chan->common.cookie = sw_desc->async_tx.cookie = cookie; > > > > Again, chan->common.cookie starts off at 0. The first cookie given out > > will be 2, and 1 will never be used. There are three drivers which > > implement it this way. > > > > Why is there this difference, and can these three be corrected to behave > > the same way as the first (and therefore the assignment of cookies > > consolidated?) > > Yes, they should be consolidated, and I believe they have drifted only > because there were no good common helpers and murphy's law took over. So lets fix this up to use the common dma_cookie_assign() helper. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Provide a common function to initialize a channels cookie values. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Now that we have the completed cookie in the dma_chan structure, we can consolidate the tx_status functions by providing a function to set the txstate structure and returning the DMA status. We also provide a separate helper to set the residue for cookies which are still in progress. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Provide a common function to do the cookie mechanics for completing a DMA descriptor. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Everyone deals with assigning DMA cookies in the same way (it's part of the API so they should be), so lets consolidate the common code into a helper function to avoid this duplication. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Add a local private header file to contain definitions and declarations which should only be used by DMA engine drivers. We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against multiple inclusion. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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