1. 27 5月, 2013 3 次提交
    • U
      mmc: core: Support aggressive power management for (e)MMC/SD · c4d770d7
      Ulf Hansson 提交于
      Aggressive power management is suitable when saving power is
      essential. At request inactivity timeout, aka pm runtime
      autosuspend timeout, the card will be suspended.
      
      Once a new request arrives, the card will be re-initalized and
      thus the first request will suffer from a latency. This latency
      is card-specific, experiments has shown in general that SD-cards
      has quite poor initialization time, around 300ms-1100ms. eMMC is
      not surprisingly far better but still a couple of hundreds of ms
      has been observed.
      
      Except for the request latency, it is important to know that
      suspending the card will also prevent the card from executing
      internal house-keeping operations in idle mode. This could mean
      degradation in performance.
      
      To use this feature make sure the request inactivity timeout is
      chosen carefully. This has not been done as a part of this patch.
      
      Enable this feature by using host cap MMC_CAP_AGGRESSIVE_PM and
      by setting CONFIG_MMC_UNSAFE_RESUME.
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      c4d770d7
    • U
      mmc: block: Enable runtime pm for mmc blkdevice · e94cfef6
      Ulf Hansson 提交于
      Once the mmc blkdevice is being probed, runtime pm will be enabled.
      By using runtime autosuspend, the power save operations can be done
      when request inactivity occurs for a certain time. Right now the
      selected timeout value is set to 3 s. Obviously this value will likely
      need to be configurable somehow since it needs to be trimmed depending
      on the power save algorithm.
      
      For SD-combo cards, we are still leaving the enablement of runtime PM
      to the SDIO init sequence since it depends on the capabilities of the
      SDIO func driver.
      
      Moreover, when the blk device is being suspended, we make sure the device
      will be runtime resumed. The reason for doing this is that we want the
      host suspend sequence to be unaware of any runtime power save operations
      done for the card in this phase. Thus it can just handle the suspend as
      the card is fully powered from a runtime perspective.
      
      Finally, this patch prepares to make it possible to move BKOPS handling
      into the runtime callbacks for the mmc bus_ops. Thus IDLE BKOPS can be
      accomplished.
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      e94cfef6
    • F
      mmc: core: Only execute tuning for SDR50 and SDR104 · 810e08ee
      Fredrik Soderstedt 提交于
      Only execute tuning for sd and sdio devices that are using
      SDR50 or SDR104.
      
      Make sure clock is hold during tuning for sdio devices.
      Signed-off-by: NFredrik Soderstedt <fredrik.soderstedt@stericsson.com>
      Acked-by: NJohan Rudholm <jrudholm@gmail.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      810e08ee
  2. 25 2月, 2013 4 次提交
    • K
      mmc: sdhci: enhance preset value function · 52983382
      Kevin Liu 提交于
      4d55c5a1 ("mmc: sdhci: enable preset value after uhs initialization")
      added preset value support and enabled it by default during sd card init.
      
      Below are the enhancements introduced by this patch:
      
      1. In current code, preset value is enabled after setting clock finished,
      which means the clock is manually set by driver firstly and then suddenly
      switched to preset value at this point. So the first setting is useless
      and unnecessary. What's more, the first clock setting may differ from the
      preset one.  The better way is enable preset value just after switch to
      UHS mode so the preset value can take effect immediately. So move preset
      value enable from mmc_sd_init_card to sdhci_set_ios which will be called
      during set timing.
      
      2. In current code, preset value is disabled at the beginning of
      mmc_attach_sd.  It's too late since low freq (400khz) should be set in
      mmc_power_up.  So move preset value disable to sdhci_set_ios which will
      be called during power up.
      
      3. host->clock and ios->drv_type should also be updated according to the
      preset value if it's enabled. Current code missed this.
      
      4. This patch also introduce a quirk to disable preset value in case
      preset value doesn't work.
      
      This patch has been verified on sdhci-pxav3 platform with both preset
      enabled and disabled.
      Signed-off-by: NKevin Liu <kliu5@marvell.com>
      Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      52983382
    • J
      mmc: core: Fixup signal voltage switch · 0797e5f1
      Johan Rudholm 提交于
      When switching SD and SDIO cards from 3.3V to 1.8V signal levels, the
      clock should be gated for 5 ms during the step. After enabling the
      clock, the host should wait for at least 1 ms before checking for
      failure. Failure by the card to switch is indicated by dat[0:3] being
      pulled low. The host should check for this condition and power-cycle
      the card if failure is indicated.
      
      Add a retry mechanism for the SDIO case.
      
      If the voltage switch fails repeatedly, give up and continue the
      initialization using the original voltage.
      
      This patch places a couple of requirements on the host driver:
      
       1) mmc_set_ios with ios.clock = 0 must gate the clock
       2) mmc_power_off must actually cut the power to the card
       3) The card_busy host_ops member must be implemented
      
      if these requirements are not fulfilled, the 1.8V signal voltage switch
      will still be attempted but may not be successful.
      Signed-off-by: NJohan Rudholm <johan.rudholm@stericsson.com>
      Signed-off-by: NKevin Liu <kliu5@marvell.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Tested-by: NWei WANG <wei_wang@realsil.com.cn>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      0797e5f1
    • J
      mmc: core: Break out start_signal_voltage_switch · 567c8903
      Johan Rudholm 提交于
      Allow callers to access the start_signal_voltage_switch host_ops
      member without going through any cmd11 logic. This is mostly a
      preparation for the following signal voltage switch patch.
      
      Also, reset ios.signal_voltage to its original value if
      start_signal_voltage_switch fails.
      Signed-off-by: NJohan Rudholm <johan.rudholm@stericsson.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Tested-by: NWei WANG <wei_wang@realsil.com.cn>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      567c8903
    • J
      3f8a7fab
  3. 23 7月, 2012 3 次提交
    • A
      mmc: core: reset signal voltage on power up · 108ecc4c
      Aaron Lu 提交于
      Add a call to mmc_set_signal_voltage() to set signal voltage to 3.3v in
      mmc_power_up so that we do not need to touch signal voltage setting in
      mmc/sd/sdio init functions and rescan function.
      
      For mmc/sd cards, when doing a suspend/resume cycle, consider the unsafe
      resume case, the card will lose its power and when powered on again, we
      will set signal voltage to 3.3v in mmc_power_up before its resume function
      gets called, which will re-init the card.
      
      And for sdio cards, when doing a suspend/resume cycle, consider the unsafe
      resume case, the card will either lose its power or not depending on if it
      wants to wakeup the host. If power is not maintained, it is the same case as
      mmc/sd cards. If power is maintained, mmc_power_up will not be called and
      the card's signal voltage will remain at the last setting.
      Signed-off-by: NAaron Lu <aaron.lu@amd.com>
      Tested-by: NVenkatraman S <svenkatr@ti.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      108ecc4c
    • A
      mmc: sd: Fix sd current limit setting · 55c4665e
      Aaron Lu 提交于
      Host has different current capabilities at different voltages, we need
      to record these settings seperately. The defined voltages are 1.8/3.0/3.3.
      For other voltages, we do not touch current limit setting.
      
      Before we set the current limit for the sd card, find out the host's
      operating voltage first and then find out the current capabilities of
      the host at that voltage to set the current limit.
      Signed-off-by: NAaron Lu <aaron.lu@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      55c4665e
    • A
      mmc: core: Simplify and fix for SD switch processing · a39ca6ae
      Aaron Lu 提交于
      In mmc_read_switch, just do a one time mode 0 switch command to get the
      support bits information, no need to do multiple times as the support
      bits do not change with different arguments.
      
      And no need to check current limit support bits, as these bits are
      fixed according to the signal voltage. If the signal voltage is 1.8V,
      the support bits would be 0xf and if the signal voltage is 3.3V, the
      support bits would be 0x01. We will check host's ability to set the
      current limit.
      Signed-off-by: NAaron Lu <aaron.lu@amd.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      a39ca6ae
  4. 21 7月, 2012 2 次提交
  5. 06 6月, 2012 1 次提交
  6. 05 3月, 2012 1 次提交
  7. 14 2月, 2012 1 次提交
  8. 13 1月, 2012 1 次提交
  9. 12 1月, 2012 3 次提交
  10. 01 11月, 2011 1 次提交
  11. 27 10月, 2011 4 次提交
  12. 01 9月, 2011 1 次提交
    • S
      mmc: sd: UHS-I bus speed should be set last in UHS initialization · 93c712f9
      Subhash Jadavani 提交于
      mmc_sd_init_uhs_card function sets the driver type, current limit
      and bus speed mode on card as well as on host controller side.
      
      Currently bus speed mode is set by sending CMD6 to card and
      immediately setting the timing mode in host controller. But
      then before initiating tuning sequence, it also tries to set
      current limit by sending CMD6 to card which results in data
      timeout errors in controller if bus speed mode is SDR50/SDR104 mode.
      
      So basically bus speed mode should be set only after current limit
      is set in the card and immediately after setting the bus speed mode,
      tuning sequence should be initiated.
      Signed-off-by: NSubhash Jadavani <subhashj@codeaurora.org>
      Reviewed-by: NArindam Nath <arindam.nath@amd.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      93c712f9
  13. 21 7月, 2011 1 次提交
    • P
      mmc: core: Set non-default Drive Strength via platform hook · ca8e99b3
      Philip Rakity 提交于
      Non default Drive Strength cannot be set automatically.  It is a function
      of the board design and only if there is a specific platform handler can
      it be set.  The platform handler needs to take into account the board
      design.  Pass to the platform code the necessary information.
      
      For example:  The card and host controller may indicate they support HIGH
      and LOW drive strength.  There is no way to know what should be chosen
      without specific board knowledge.  Setting HIGH may lead to reflections
      and setting LOW may not suffice.  There is no mechanism (like ethernet
      duplex or speed pulses) to determine what should be done automatically.
      
      If no platform handler is defined -- use the default value.
      Signed-off-by: NPhilip Rakity <prakity@marvell.com>
      Reviewed-by: NArindam Nath <arindam.nath@amd.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      ca8e99b3
  14. 26 5月, 2011 1 次提交
  15. 25 5月, 2011 9 次提交
    • P
      mmc: core: eMMC signal voltage does not use CMD11 · 261bbd46
      Philip Rakity 提交于
      eMMC chips do not use CMD11 when changing voltage.  Add extra
      argument to call to indicate if CMD11 needs to be sent.
      Signed-off-by: NPhilip Rakity <prakity@marvell.com>
      Reviewed-by: NArindam Nath <arindam.nath@amd.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      261bbd46
    • A
      mmc: sdhci: enable preset value after uhs initialization · 4d55c5a1
      Arindam Nath 提交于
      According to the Host Controller spec v3.00, setting Preset Value Enable
      in the Host Control2 register lets SDCLK Frequency Select, Clock Generator
      Select and Driver Strength Select to be set automatically by the Host
      Controller based on the UHS-I mode set. This patch enables this feature.
      Since Preset Value Enable makes sense only for UHS-I cards, we enable this
      feature after successfull UHS-I initialization. We also reset Preset Value
      Enable next time before initialization.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      4d55c5a1
    • A
      mmc: sd: add support for tuning during uhs initialization · b513ea25
      Arindam Nath 提交于
      Host Controller needs tuning during initialization to operate SDR50
      and SDR104 UHS-I cards. Whether SDR50 mode actually needs tuning is
      indicated by bit 45 of the Host Controller Capabilities register.
      A new command CMD19 has been defined in the Physical Layer spec
      v3.01 to request the card to send tuning pattern.
      
      We enable Buffer Read Ready interrupt at the very begining of tuning
      procedure, because that is the only interrupt generated by the Host
      Controller during tuning. We program the block size to 64 in the
      Block Size register. We make sure that DMA Enable and Multi Block
      Select in the Transfer Mode register are set to 0 before actually
      sending CMD19. The tuning block is sent by the card to the Host
      Controller using DAT lines, so we set Data Present Select (bit 5) in
      the Command register. The Host Controller is responsible for doing
      the verfication of tuning block sent by the card at the hardware
      level. After sending CMD19, we wait for Buffer Read Ready interrupt.
      In case we don't receive an interrupt after the specified timeout
      value, we fall back on fixed sampling clock by setting Execute
      Tuning (bit 6) and Sampling Clock Select (bit 7) of Host Control2
      register to 0. Before exiting the tuning procedure, we disable Buffer
      Read Ready interrupt and re-enable other interrupts.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      b513ea25
    • A
      mmc: sd: report correct speed and capacity of uhs cards · 3a303511
      Arindam Nath 提交于
      Since only UHS-I cards respond with S18A set in response to ACMD41,
      we set the card as ultra-high-speed after successfull initialization.
      We need to decide whether a card is SDXC based on the C_SIZE field
      of CSDv2.0 register. According to Physical Layer spec v3.01, the
      minimum value of C_SIZE for SDXC card is 00FFFFh.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      3a303511
    • A
      mmc: sd: set current limit for uhs cards · 5371c927
      Arindam Nath 提交于
      We decide on the current limit to be set for the card based on the
      Capability of Host Controller to provide current at 1.8V signalling,
      and the maximum current limit of the card as indicated by CMD6
      mode 0. We then set the current limit for the card using CMD6 mode 1.
      As per the Physical Layer Spec v3.01, the current limit switch is
      only applicable for SDR50, SDR104, and DDR50 bus speed modes. For
      other UHS-I modes, we set the default current limit of 200mA.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      5371c927
    • A
      mmc: sd: add support for uhs bus speed mode selection · 49c468fc
      Arindam Nath 提交于
      This patch adds support for setting UHS-I bus speed mode during UHS-I
      initialization procedure. Since both the host and card can support
      more than one bus speed, we select the highest speed based on both of
      their capabilities. First we set the bus speed mode for the card using
      CMD6 mode 1, and then we program the host controller to support the
      required speed mode. We also set High Speed Enable in case one of the
      UHS-I modes is selected. We take care to reset SD clock before setting
      UHS mode in the Host Control2 register, and then re-enable it as per
      the Host Controller spec v3.00. We then set the clock frequency for
      the UHS-I mode selected.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      49c468fc
    • A
      mmc: sd: add support for driver type selection · d6d50a15
      Arindam Nath 提交于
      This patch adds support for setting driver strength during UHS-I
      initialization procedure. Since UHS-I cards set S18A (bit 24) in
      response to ACMD41, we use this as a base for UHS-I initialization.
      We modify the parameter list of mmc_sd_get_cid() so that we can
      save the ROCR from ACMD41 to check whether bit 24 is set.
      
      We decide whether the Host Controller supports A, C, or D driver
      type depending on the Capabilities register. Driver type B is
      suported by default. We then set the appropriate driver type for
      the card using CMD6 mode 1. As per Host Controller spec v3.00, we
      set driver type for the host only if Preset Value Enable in the
      Host Control2 register is not set. SDHCI_HOST_CONTROL has been
      renamed to SDHCI_HOST_CONTROL1 to conform to the spec.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      d6d50a15
    • A
      mmc: sd: query function modes for uhs cards · 013909c4
      Arindam Nath 提交于
      SD cards which conform to Physical Layer Spec v3.01 can support
      additional Bus Speed Modes, Driver Strength, and Current Limit
      other than the default values. We use CMD6 mode 0 to read these
      additional card functions. The values read here will be used
      during UHS-I initialization steps.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      013909c4
    • A
      mmc: sd: add support for signal voltage switch procedure · f2119df6
      Arindam Nath 提交于
      Host Controller v3.00 adds another Capabilities register. Apart
      from other things, this new register indicates whether the Host
      Controller supports SDR50, SDR104, and DDR50 UHS-I modes. The spec
      doesn't mention about explicit support for SDR12 and SDR25 UHS-I
      modes, so the Host Controller v3.00 should support them by default.
      Also if the controller supports SDR104 mode, it will also support
      SDR50 mode as well. So depending on the host support, we set the
      corresponding MMC_CAP_* flags. One more new register. Host Control2
      is added in v3.00, which is used during Signal Voltage Switch
      procedure described below.
      
      Since as per v3.00 spec, UHS-I supported hosts should set S18R
      to 1, we set S18R (bit 24) of OCR before sending ACMD41. We also
      need to set XPC (bit 28) of OCR in case the host can supply >150mA.
      This support is indicated by the Maximum Current Capabilities
      register of the Host Controller.
      
      If the response of ACMD41 has both CCS and S18A set, we start the
      signal voltage switch procedure, which if successfull, will switch
      the card from 3.3V signalling to 1.8V signalling. Signal voltage
      switch procedure adds support for a new command CMD11 in the
      Physical Layer Spec v3.01. As part of this procedure, we need to
      set 1.8V Signalling Enable (bit 3) of Host Control2 register, which
      if remains set after 5ms, means the switch to 1.8V signalling is
      successfull. Otherwise, we clear bit 24 of OCR and retry the
      initialization sequence. When we remove the card, and insert the
      same or another card, we need to make sure that we start with 3.3V
      signalling voltage. So we call mmc_set_signal_voltage() with
      MMC_SIGNAL_VOLTAGE_330 set so that we are back to 3.3V signalling
      voltage before we actually start initializing the card.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      f2119df6
  16. 16 3月, 2011 1 次提交
  17. 09 1月, 2011 2 次提交
  18. 23 10月, 2010 1 次提交