- 24 5月, 2014 2 次提交
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由 Thomas Petazzoni 提交于
The Marvell Armada 38x platform has a SDHCI interface managed by the sdhci-pxav3 MMC host driver. It therefore makes sense to enable this driver in multi_v7_defconfig, which supports the Armada 38x platform. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NJason Cooper <jason@lakedaemon.net> Signed-off-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Gregory CLEMENT 提交于
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled for the xHCI USB hosts, so this commit enables the corresponding Kconfig option in multi_v7_defconfig. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: arm@kernel.org Cc: Kevin Hilman <khilman@linaro.org> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 23 5月, 2014 3 次提交
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由 Maxime Ripard 提交于
Now that the reset code are part of drivers of their own, we need those in the defconfig. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
Now that the A31 reset code is a driver of its own, we need it in the defconfig. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Stephen Boyd 提交于
Now that DT based platforms are split out of mach-msm into mach-qcom, put back a non-DT based SoC into the msm_defconfig and stop selecting unsupported drivers. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NKumar Gala <galak@codeaurora.org>
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- 22 5月, 2014 1 次提交
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由 Thomas Petazzoni 提交于
Since Armada 370, XP, 375 and 38x have PCI MSI support, it makes sense to enable CONFIG_PCI_MSI in mvebu_v7_defconfig. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400598964-2062-1-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 17 5月, 2014 1 次提交
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由 Stephen Boyd 提交于
Add a defconfig for mach-qcom platforms (copied from msm_defconfig). Although these platforms are part of the multi-platform kernel, it's useful to have a stripped down version of the defconfig that just selects the DT based Qualcomm platforms and drivers. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NKumar Gala <galak@codeaurora.org>
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- 16 5月, 2014 1 次提交
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由 Gregory CLEMENT 提交于
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled for the xHCI USB hosts, so this commit enables the corresponding Kconfig option in mvebu_v7_defconfig. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-13-git-send-email-gregory.clement@free-electrons.comSigned-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-13-git-send-email-gregory.clement@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 14 5月, 2014 1 次提交
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由 Stephen Warren 提交于
AT24C EEPROM: This is used for the board ID EEPROM on Jetson TK1, as well as likely a whole slew of other NVIDIA reference boards; we simply haven't added enabled the EEPROM in the DT files until now. MTD_SPI_NOR: This defconfig contains the CONFIG_M25P80 symbol, which is now dependent on the MTD_SPI_NOR symbol. Add CONFIG_MTD_SPI_NOR to satisfy the new dependency. FRAMEBUFFER_CONSOLE_ROTATION: Needed for devices like Tegra Note 7 and NVIDIA SHIELD to get the boot console in the expected orientation. CAN*, RTC_DRV_DS1307: Toradex Colibri Evaluation Board uses the DS1307 RTC and the MCP251x CAN controller. The NVIDIA Tegra 3 based Colibri T30 module can be used on this carrier board. Furthermore the NVIDIA Tegra 3 based Apalis T30 module too contains two MCP251x CAN controllers. INPUT_JOYDEV: NVIDIA SHIELD embeds a USB joystick device. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 11 5月, 2014 1 次提交
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由 Lad, Prabhakar 提交于
this patch drops CONFIG_COMMON_CLK_DEBUG option as this config option is now obsolete. CC: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Olof Johansson <olof@lixom.net> Signed-off-by: NLad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 06 5月, 2014 3 次提交
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由 Alexandre Belloni 提交于
Now that we support Berlin BG2Q, select CONFIG_MACH_BERLIN_BG2Q so that we can boot BG2Q based boards like the BG2Q DMP. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Antoine Ténart 提交于
The newly integrated dwapb gpio driver handles the Berlin SoCs GPIOs. Add this driver to the multi_v7_defconfig. Signed-off-by: NAntoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
This is used for the board ID EEPROM on Jetson TK1, as well as likely a whole slew of other NVIDIA reference boards; we simply haven't added enabled the EEPROM in the DT files until now. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 05 5月, 2014 3 次提交
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由 Andrew Lunn 提交于
Enable simple-card and the CODEC. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399141819-23924-10-git-send-email-andrew@lunn.chSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Andrew Lunn 提交于
Enable simple-card and the CODEC. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399141819-23924-9-git-send-email-andrew@lunn.chSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Brian Norris 提交于
These defconfigs contain the CONFIG_M25P80 symbol, which is now dependent on the MTD_SPI_NOR symbol. Add CONFIG_MTD_SPI_NOR to satisfy the new dependency. At the same time, drop the now-nonexistent CONFIG_MTD_CHAR symbol. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Acked-by: NJason Cooper <jason@lakedaemon.net> Acked-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1398925607-7482-9-git-send-email-computersforpeace@gmail.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 28 4月, 2014 1 次提交
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由 Mark Salter 提交于
The kvm/mmu code shared by arm and arm64 uses kalloc() to allocate a bounce page (if hypervisor init code crosses page boundary) and hypervisor PGDs. The problem is that kalloc() does not guarantee the proper alignment. In the case of the bounce page, the page sized buffer allocated may also cross a page boundary negating the purpose and leading to a hang during kvm initialization. Likewise the PGDs allocated may not meet the minimum alignment requirements of the underlying MMU. This patch uses __get_free_page() to guarantee the worst case alignment needs of the bounce page and PGDs on both arm and arm64. Cc: <stable@vger.kernel.org> # 3.10+ Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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- 26 4月, 2014 4 次提交
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由 Will Deacon 提交于
KVM currently crashes and burns on big-endian hosts, so don't allow it to be selected until we've got that fixed. Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Thomas Petazzoni 提交于
The Marvell Armada 38x platform needs the ahci_mvebu driver enabled for the AHCI interfaces, so this commit enables the corresponding Kconfig option in mvebu_v7_defconfig. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397574006-5868-5-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Linus Torvalds 提交于
The mmu-gather operation 'tlb_flush_mmu()' has done two things: the actual tlb flush operation, and the batched freeing of the pages that the TLB entries pointed at. This splits the operation into separate phases, so that the forced batched flushing done by zap_pte_range() can now do the actual TLB flush while still holding the page table lock, but delay the batched freeing of all the pages to after the lock has been dropped. This in turn allows us to avoid a race condition between set_page_dirty() (as called by zap_pte_range() when it finds a dirty shared memory pte) and page_mkclean(): because we now flush all the dirty page data from the TLB's while holding the pte lock, page_mkclean() will be held up walking the (recently cleaned) page tables until after the TLB entries have been flushed from all CPU's. Reported-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: NDave Hansen <dave.hansen@intel.com> Acked-by: NHugh Dickins <hughd@google.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Thomas Petazzoni 提交于
The Marvell Armada 38x platform has a SDHCI interface managed by the sdhci-pxav3 MMC host driver. It therefore makes sense to enable this driver in mvebu_v7_defconfig. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1397486478-16991-3-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 25 4月, 2014 6 次提交
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由 Sebastian Hesselbarth 提交于
Some Marvell PJ4B CPUs also implement iWMMXt extensions. With a proper check for iWMMXt coprocessors now in place, enable it by default on PJ4B. While at it, also allow to manually select the corresponding Kconfig option. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Sebastian Hesselbarth 提交于
Commit fdb487f5 ("ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7") introduced a cpuid check for Marvell PJ4 processors to fix a regression caused by adding PJ4 based Marvell Dove into multi_v7. Unfortunately, this check is too narrow to catch PJ4 used on Dove itself and breaks iWMMXt support. This patch therefore relaxes the cpuid mask to match both PJ4 and PJ4B. Also, rework the given comment about PJ4/PJ4B modifications to be a little bit more specific about the differences. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Sebastian Hesselbarth 提交于
commit fdb487f5 ("ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7") introduced a fix for checking PJ4 cpuid to not use PJ4 specific coprocessor access on non-PJ4 platforms. Unfortunately, this in turn broke Marvell Armada 370/XP, both comprising Marvell PJ4B CPUs without iWMMXt extension. Instead of only checking for cpuid, which may not be sufficient to determine iWMMXt support, the presence of iWMMXt coprocessors can be checked by enabling and reading the Coprocessor ID register (wCID, register 0 of CP1). Therefore this adds an explicit check for the presence and correct wCID value, before enabling iWMMXt capabilities. As a bonus, also print the iWMMXt version of a detected coprocessor. This has been tested to properly detect iWMMXt presence/absence on: - PJ4, CPUID 0x560f5815, wCID 0x56052001: Marvell Dove, iWMMXt v2 - PJ4B, CPUID 0x561f5811: Marvell Armada 370, no iWMMXt - PJ4B, CPUID 0x562f5841, wCID 0x56052001: Marvell Armada 1500, iWMMXt v2 - PJ4B, CPUID 0x562f5842: Marvell Armada XP, no iWMMXt Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Sebastian Hesselbarth 提交于
This fixes PJ4 coprocessor init to only expose iWMMXt capabilities, if the corresponding kernel support for iWMMXt is enabled. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Sebastian Hesselbarth 提交于
iwmmxt.S requires special treatment of coprocessor access registers for PJ4 and XScale-based CPUs. It only checks for CPU_PJ4 and drops down to XScale-based treatment on all other architectures. As some PJ4B also come with iWMMXt and also need PJ4 treatment, rework the corresponding preprocessor directives to explicitly check for supported architectures and fail on unsupported ones. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Punit Agrawal 提交于
The SPC stores voltage in mV while the code assumes it was returning uV. Convert the returned voltage to uV before storing. Also fix the comment depicting voltage to uV. Signed-off-by: NPunit Agrawal <punit.agrawal@arm.com> Reviewed-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NPawel Moll <pawel.moll@arm.com>
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- 24 4月, 2014 10 次提交
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由 Stephen Warren 提交于
Tegra124 only has 4 UARTs. Parts of the documentation hint at a fifth UART, but this appears to be left-over from earlier SoC documentation. Remove the non-existent DT node for UART5. Cc: <stable@vger.kernel.org> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Paul Bolle 提交于
Commit a7cbe92c ("ARM: tegra: remove tegra EMC scaling driver") removed the only user of TEGRA_EMC_SCALING_ENABLE. Remove its Kconfig entry too. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Domenico Andreoli 提交于
Few things were out of order: - removed ARCH_BCM2835 duplicate - shuffled ARCH_BCM_5301X, ARCH_U8500 and ARCH_U300 around so to keep the list sorted Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-by: NDomenico Andreoli <domenico.andreoli@linux.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Rob Herring 提交于
In commit ddb902cc (ARM: centralize common multi-platform kconfig options), CLKSRC_OF was removed from some platforms, but not added to ARCH_MULTIPLATFORM. Fix this. Reported-by: NLauri Hintsala <lauri.hintsala@bluegiga.com> Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Alex Elder 提交于
I get a build warning because spear_clocksource_init() calls clocksource_mmio_init(), but it doesn't have an __init annotation. Fix that. Signed-off-by: NAlex Elder <elder@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Andrea Adami 提交于
hx4700 needs the same fix as in 9705e746 "ARM: pxa: fix various compilation problems" Fix build errors. Initial one is: /linux/arch/arm/mach-pxa/include/mach/hx4700.h:18:32: error: 'PXA_NR_BUILTIN_GPIO' undeclared here (not in a function) | #define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO Cc: stable@vger.kernel.org # v3.13+ Signed-off-by: NAndrea Adami <andrea.adami@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Heinrich Schuchardt 提交于
dcscb_allcpus_mask is an array of size 2. The index variable cluster has to be checked against this limit before accessing the array. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NPawel Moll <pawel.moll@arm.com>
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由 Ezequiel Garcia 提交于
CONFIG_FHANDLE is required by systemd >= 210 to spawn a serial TTY. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1396539014-8673-2-git-send-email-ezequiel.garcia@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Ezequiel Garcia 提交于
NFSroot is very frequently used by developers to boot, so let's make our lives simpler and enable it by default. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1396539014-8673-1-git-send-email-ezequiel.garcia@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Tony Lindgren 提交于
At least the smc91x driver expects the device to be at 0x300 offset from bus base address. This does not work currently for GPMC when booted in device tree mode as it attempts to remap the the allocated GPMC partition to the address configured by the device tree plus the device offset. Note that this works just fine when booted with legacy mode. Let's fix the issue by just ignoring any device specific offset while remapping. And let's make sure the remap address confirms to the GPMC 16MB minimum granularity as listed in the TRM for GPMC_CONFIG7 BASEADDRESS bits. Otherwise we can get something like this: omap-gpmc 6e000000.gpmc: cannot remap GPMC CS 1 to 0x01000300 Cc: Pekon Gupta <pekon@ti.com> Reviewed-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 23 4月, 2014 3 次提交
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由 Ritesh Harjani 提交于
68efd7d2("arm: dma-mapping: remove order parameter from arm_iommu_create_mapping()") is causing kernel panic because it wrongly sets the value of mapping->size: Unable to handle kernel NULL pointer dereference at virtual address 000000a0 pgd = e7a84000 [000000a0] *pgd=00000000 ... PC is at bitmap_clear+0x48/0xd0 LR is at __iommu_remove_mapping+0x130/0x164 Fix it by correcting mapping->size value. Signed-off-by: NRitesh Harjani <ritesh.harjani@gmail.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
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由 Geert Uytterhoeven 提交于
s/interrupts-names/interrupt-names/g s/clocks-names/clock-names/g Some of the binding files and device tree files get this wrong and the kernel won't be able to pick it up. Fix them up now so that they don't get widely used. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by : Patrice Chotard <patrice.chotard@st.com> Signed-off-by: NGrant Likely <grant.likely@linaro.org>
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由 Miklos Szeredi 提交于
Signed-off-by: NMiklos Szeredi <mszeredi@suse.cz> [dropped arch/arm/include/asm/unistd.h changes --rmk] Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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