- 03 12月, 2008 8 次提交
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由 Johannes Berg 提交于
On my screen, when something crashes, I only have space for maybe 16 functions of the stack trace before the information above it scrolls off the screen. It's easy to hack the kernel to print out only that much, but it's harder to remember to do it. This introduces a config option for it so that I can keep the setting in my config. Signed-off-by: NJohannes Berg <johannes@sipsolutions.net> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Kumar Gala 提交于
Refactor the RCU based pte free code that was used on ppc64 to be used on all powerpc. Additionally refactor pte_free() & pte_free_kernel() into common code between ppc32 & ppc64. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Kumar Gala 提交于
The tlb invalidates in kmap_atomic/kunmap_atomic can be called from IRQ context, however they are only local invalidates (on the processor that the kmap was called on). In the future we want to use IPIs to do tlb invalidates this causes issue since flush_tlb_page() is considered a broadcast invalidate. Add local_flush_tlb_page() as a non-broadcast invalidate and use it in kmap_atomic() since we don't have enough information in the flush_tlb_page() call to determine its local. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Kumar Gala 提交于
Clean up the ifdefs so we only use hash_page_sync if we have CONFIG_SMP && CONFIG_PPC_STD_MMU_32. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Benjamin Herrenschmidt 提交于
The 32-bit hash code didn't need it so far so we don't update mm->cpu_vm_mask on context switch. This however will break when we merge the RCU based page table freeing patch and other upcoming 32-bit embedded SMP work, so this adds the update. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Benjamin Herrenschmidt 提交于
On PowerPC 4xx or other non cache-coherent platforms, we lost the appropriate cache flushing in dma_map_sg() when merging the 32 and 64-bit DMA code (commit 4fc665b8, "powerpc: Merge 32 and 64-bit dma code"). This restores it. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Kumar Gala 提交于
In the CONFIG_SMP case the irq_choose_cpu() code was returning back a logical cpu id not the physical id. We were writing that directly into the HW register. We need to be calling get_hard_smp_processor_id() so irq_choose_cpu() always returns a physical cpu id. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 01 12月, 2008 9 次提交
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由 Milton Miller 提交于
attr_smt_snooze_delay is only defined for CONFIG_PPC64, so protect the attribute removal with the same condition. This fixes this build error on 32-bit SMP configurations: /data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c: In function ‘unregister_cpu_online’: /data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c:722: error: ‘attr_smt_snooze_delay’ undeclared (first use in this function) /data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c:722: error: (Each undeclared identifier is reported only once /data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c:722: error: for each function it appears in.) Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Paul Mackerras 提交于
It turns out that on Cell, on a kernel with CONFIG_VIRT_CPU_ACCOUNTING = y, if a program sets the SO (summary overflow) bit in the XER and then does a system call, the SO bit in CR0 will be set on return regardless of whether the system call detected an error. Since CR0.SO is used as the error indication from the system call, this means that all system calls appear to fail. The reason is that the workaround for the timebase bug on Cell uses a compare instruction. With CONFIG_VIRT_CPU_ACCOUNTING = y, the ACCOUNT_CPU_USER_ENTRY macro reads the timebase, so we end up doing a compare instruction, which copies XER.SO to CR0.SO. Since we were doing this in the system call entry patch after clearing CR0.SO but before saving the CR, this meant that the saved CR image had CR0.SO set if XER.SO was set on entry. This fixes it by moving the clearing of CR0.SO to after the ACCOUNT_CPU_USER_ENTRY call in the system call entry path. Signed-off-by: NPaul Mackerras <paulus@samba.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Arnd Bergmann 提交于
An earlier patch from Jens Osterkamp attempted to fix GDB watchpoints by enabling the DABRX register at boot time. Unfortunately, this did not work on SMP setups, where secondary CPUs were still using the power-on DABRX value. This introduces the same change for secondary CPUs on cell as well. Reported-by: NUlrich Weigand <Ulrich.Weigand@de.ibm.com> Tested-by: NUlrich Weigand <Ulrich.Weigand@de.ibm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Arnd Bergmann 提交于
Kexec/kdump currently fails on the IBM QS2x blades when the kexec happens on a CPU other than the initial boot CPU. It turns out that this is the result of mpic_init trying to set affinity of each interrupt vector to the current boot CPU. As far as I can tell, the same problem is likely to exist on any secondary MPIC, because they have to deliver interrupts to the first output all the time. There are two potential solutions for this: either not set up affinity at all for secondary MPICs, or assume that a single CPU output is connected to the upstream interrupt controller and hardcode affinity to that per architecture. This patch implements the second approach, defaulting to the first output. Currently, all known secondary MPICs are routed to their upstream port using the first destination, so we hardcode that. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Arnd Bergmann 提交于
The MSI capture logic for the axon bridge can sometimes lose interrupts in case of high DMA and interrupt load, when it signals an MSI interrupt to the MPIC interrupt controller while we are already handling another MSI. Each MSI vector gets written into a FIFO buffer in main memory using DMA, and that DMA access is normally flushed by the actual interrupt packet on the IOIF. An MMIO register in the MSIC holds the position of the last entry in the FIFO buffer that was written. However, reading that position does not flush the DMA, so that we can observe stale data in the buffer. In a stress test, we have observed the DMA to arrive up to 14 microseconds after reading the register. This patch works around this problem by retrying the access to the FIFO buffer. We can reliably detect the conditioning by writing an invalid MSI vector into the FIFO buffer after reading from it, assuming that all MSIs we get are valid. After detecting an invalid MSI vector, we udelay(1) in the interrupt cascade for up to 100 times before giving up. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Dave Hansen 提交于
I got a bug report about a distro kernel not booting on a particular machine. It would freeze during boot: > ... > Could not find start_pfn for node 1 > [boot]0015 Setup Done > Built 2 zonelists in Node order, mobility grouping on. Total pages: 123783 > Policy zone: DMA > Kernel command line: > [boot]0020 XICS Init > [boot]0021 XICS Done > PID hash table entries: 4096 (order: 12, 32768 bytes) > clocksource: timebase mult[7d0000] shift[22] registered > Console: colour dummy device 80x25 > console handover: boot [udbg0] -> real [hvc0] > Dentry cache hash table entries: 1048576 (order: 7, 8388608 bytes) > Inode-cache hash table entries: 524288 (order: 6, 4194304 bytes) > freeing bootmem node 0 I've reproduced this on 2.6.27.7. It is caused by commit 8f64e1f2 ("powerpc: Reserve in bootmem lmb reserved regions that cross NUMA nodes"). The problem is that Jon took a loop which was (in pseudocode): for_each_node(nid) NODE_DATA(nid) = careful_alloc(nid); setup_bootmem(nid); reserve_node_bootmem(nid); and broke it up into: for_each_node(nid) NODE_DATA(nid) = careful_alloc(nid); setup_bootmem(nid); for_each_node(nid) reserve_node_bootmem(nid); The issue comes in when the 'careful_alloc()' is called on a node with no memory. It falls back to using bootmem from a previously-initialized node. But, bootmem has not yet been reserved when Jon's patch is applied. It gives back bogus memory (0xc000000000000000) and pukes later in boot. The following patch collapses the loop back together. It also breaks the mark_reserved_regions_for_nid() code out into a function and adds some comments. I think a huge part of introducing this bug is because for loop was too long and hard to read. The actual bug fix here is the: + if (end_pfn <= node->node_start_pfn || + start_pfn >= node_end_pfn) + continue; Signed-off-by: NDave Hansen <dave@linux.vnet.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Adhemerval Zanella 提交于
Currently, some PCIe devices on POWER6 machines do not get interrupts assigned correctly. The problem is that OF doesn't create an "interrupt" property for them. The fix is for of_irq_map_pci to fall back to using the value in the PCI interrupt-pin register in config space, as we do when there is no OF device-tree node for the device. I have verified that this works fine with a pair of Squib-E SAS adapter on a P6-570. Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Christoph Hellwig 提交于
All architectures now use the generic compat_sys_ptrace, as should every new architecture that needs 32bit compat (if we'll ever get another). Remove the now superflous __ARCH_WANT_COMPAT_SYS_PTRACE define, and also kill a comment about __ARCH_SYS_PTRACE that was added after __ARCH_SYS_PTRACE was already gone. Signed-off-by: NChristoph Hellwig <hch@lst.de> Acked-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Al Viro 提交于
called only from __init, calls __init. Incidentally, it ought to be static in file. Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 25 11月, 2008 1 次提交
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由 Hollis Blanchard 提交于
When the VM exits, we must call put_page() for every page referenced in the shadow TLB. Without this patch, we usually leak 30-50 host pages (120 - 200 KiB with 4 KiB pages). The maximum number of pages leaked is the size of our shadow TLB, 64 pages. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 21 11月, 2008 1 次提交
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由 Jeremy Kerr 提交于
Currently, we can end up in an infinite loop if we get a signal while the kernel has faulted in spufs_ps_fault. Eg: alarm(1); write(fd, some_spu_psmap_register_address, 4); - the write's copy_from_user will fault on the ps mapping, and signal_pending will be non-zero. Because returning from the fault handler will never clear TIF_SIGPENDING, so we'll just keep faulting, resulting in an unkillable process using 100% of CPU. This change returns VM_FAULT_SIGBUS if there's a fatal signal pending, letting us escape the loop. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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- 20 11月, 2008 3 次提交
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由 Michael Barkowski 提交于
ethernet0 (called FSL UEC0 in U-Boot) should be enet1 (UCC3/eth1), and ethernet1 should be enet0 (UCC2/eth0), to be consistent with U-Boot so that the interfaces do not swap addresses when control passes from U-Boot to the kernel. Signed-off-by: NMichael Barkowski <michael.barkowski@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Martyn Welch 提交于
The Marvell PHY driver is currently being used for the 88E1111 on the SBC610. This driver is causing the link to run in 10/Half mode, the generic PHY driver is correctly configuring the PHY as 1000/Full. Edit default config to use generic PHY driver. Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Trent Piepho 提交于
It's 1MB, not 512KB. Newer U-Boots will fix this entry, but that's no reason to have the wrong value in the dts. Signed-off-by: NTrent Piepho <tpiepho@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 19 11月, 2008 13 次提交
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由 Milton Miller 提交于
MPIC has 4 ipis, so it can use the new smp_request_message_ipi to reduce pathlength when receiving an ipi. This has the side effect of using the common ipi names, and also continuing to try request the remaining messages when one fails. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Milton Miller 提交于
With the new generic smp call function helpers, I noticed the code in smp_message_recv was a single function call in many cases. While getting the message number from the ipi data is easy, we can reduce the path length by a function and data-dependent switch by registering seperate IPI actions for these simple calls. Originally I left the ipi action array exposed, but then I realized the registration code should be common too. The three users each had their own name array, so I made a fourth to convert all users to use a common one. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Robert Jennings 提交于
Linux will report the number of page-ins so that the hypervisor can better determine partition memory pressure. The hardware page size and the OS page size can be different. In the case where the hardware page size is 4k and the OS is running with 64k pages the code in commit 40900194 ("powerpc: Update page-in counter for CMM") would under-report the number of pages. This corrects the reporting to the hypervisor by incrementing the page_in count by 1 << PAGE_FACTOR each time. Reported-by: NAndrew Theurer <habanero@linux.vnet.ibm.com> Signed-off-by: NRobert Jennings <rcj@linux.vnet.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Michael Ellerman 提交于
Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Michael Ellerman 提交于
Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Michael Ellerman 提交于
Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Nick Piggin 提交于
This implements an optimised mutex fastpath for powerpc, making use of acquire and release barrier semantics. This takes the mutex lock+unlock benchmark from 203 to 173 cycles on a G5. Signed-off-by: NNick Piggin <npiggin@suse.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Nick Piggin 提交于
After commit 598056d5 ("[POWERPC] Fix rmb to order cacheable vs. noncacheable"), rmb() becomes a sync instruction, which is needed to order cacheable vs noncacheable loads. However smp_rmb() is #defined to rmb(), and smp_rmb() can be an lwsync. This restores smp_rmb() performance by using lwsync there and updates the comments. Signed-off-by: NNick Piggin <npiggin@suse.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Nick Piggin 提交于
Change 2d1b2027 ("powerpc: Fixup lwsync at runtime") removed __SUBARCH_HAS_LWSYNC, causing smp_wmb to revert back to eieio for all CPUs. This restores the behaviour intorduced in 74f06095 ("powerpc: Optimise smp_wmb on 64-bit processors"). Signed-off-by: NNick Piggin <npiggin@suse.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Mark Nelson 提交于
In exactly the same way that we updated memcpy() with new feature sections in commit 25d6e2d7 ("powerpc: Update 64bit memcpy() using CPU_FTR_UNALIGNED_LD_STD"), we do the same thing here for __copy_tofrom_user(). Once again this is purely a performance tweak for Cell and Power6 - this has no effect on all the other 64bit powerpc chips. We can make these same changes to __copy_tofrom_user() because the basic copy algorithm is the same as in memcpy() - this version just has all the exception handling logic needed when copying to or from userspace as well as a special case for copying whole 4K pages that are page aligned. CPU_FTR_UNALIGNED_LD_STD CPU was added in commit 4ec577a2 ("powerpc: Add new CPU feature: CPU_FTR_UNALIGNED_LD_STD"). We also make the same simple one line change from cmpldi r1,... to cmpldi cr1,... for consistency. Signed-off-by: NMark Nelson <markn@au1.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Hollis Blanchard 提交于
I can't tell why this WARN_ON exists, and there's no comment explaining it. Whether the pmd is present or not, pte_alloc_kernel() seems to handle both cases. Booting a 440 kernel with 64K PAGE_SIZE triggers the warning, but boot successfully completes and I see no problems beyond that. Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Paul Mackerras 提交于
We have several instances of inline assembly code that use the addic or addic. instructions, but don't include XER in the list of clobbers. The addic and addic. instructions affect the carry bit, which is in the XER register. This adds "xer" to the list of clobbers for those inline asm statements that use addic or addic. and didn't already have it. Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Geert Uytterhoeven 提交于
Introduce ps3_gpu_mutex to synchronizes GPU-related operations, like: - invoking the L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT command using the lv1_gpu_context_attribute() hypervisor call, - handling the PS3AV_CID_AVB_PARAM packet in the PS3 A/V Settings driver. Signed-off-by: NGeert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 15 11月, 2008 3 次提交
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由 Grant Likely 提交于
Update defconfigs for running on Xilinx Virtex platforms Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
Various printk format string in code used by the Xilinx Virtex platform are not 32-bit/64-bit safe. Add correct casting to fix the bugs. Reported-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 14 11月, 2008 1 次提交
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由 Grant Likely 提交于
Without this patch it is possible to select drivers which require bestcomm support without bestcomm support being selected. This patch reworks the bestcomm dependencies to ensure the correct bestcomm tasks are always enabled. Reported-by: NHans Lehmann <hans.lehmann@ritter-elektronik.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 13 11月, 2008 1 次提交
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由 Benjamin Herrenschmidt 提交于
Those cores use the 440A type machine check (ie, they have MCSRR0/MCSRR1). They thus need to call the appropriate fixup function to hook the right variant of the exception. Without this, all machine checks become fatal due to loss of context when entering the exception handler. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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