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  1. 01 11月, 2007 1 次提交
    • V
      [POWERPC] 4xx: Workaround for the 440EP(x)/GR(x) processors identical PVR issue. · d1dfc35d
      由 Valentine Barshak 提交于 
      PowerPC 440EP(x) 440GR(x) processors have the same PVR values, since
they have identical cores. However, FPU is not supported on GR(x) and
enabling APU instruction broadcast in the CCR0 register (to enable FPU)
may cause unpredictable results. There's no safe way to detect FPU
support at runtime. This patch provides a workarund for the issue.

We use a POWER6 "logical PVR approach". First, we identify all EP(x)
and GR(x) processors as GR(x) ones (which is safe). Then we check
the device tree cpu path. If we have a EP(x) processor entry,
we call identify_cpu again with PVR | 0x8. This bit is always 0
in the real PVR. This way we enable FPU only for 440EP(x).
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
      d1dfc35d
  3. 09 10月, 2007 1 次提交
    • P
      [POWERPC] Use cache-inhibited large page bit from firmware · 84fdde5a
      由 Paul Mackerras 提交于 
      Discussions with firmware architects have confirmed that the bit in
the ibm,pa-features property that indicates support for
cache-inhibited large (>= 64kB) page mappings does in fact mean that
the hypervisor allows 64kB mappings to I/O devices.

Thus we can now enable the code that tests that bit and sets our
CPU_FTR_CI_LARGE_PAGE feature bit.
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      84fdde5a
  5. 13 9月, 2007 2 次提交
  7. 17 8月, 2007 1 次提交
  9. 22 7月, 2007 1 次提交
  11. 20 7月, 2007 6 次提交
  13. 10 7月, 2007 5 次提交
  15. 28 6月, 2007 1 次提交
  17. 02 6月, 2007 1 次提交
  19. 17 5月, 2007 1 次提交
  21. 10 5月, 2007 1 次提交
  23. 24 4月, 2007 5 次提交
  25. 13 4月, 2007 5 次提交
  27. 08 3月, 2007 2 次提交
    • D
      [POWERPC] Automatically lmb_reserve() initrd · 30437b3e
      由 David Gibson 提交于 
      At present, when an initrd is passed to the kernel used flat device
tree properties, the memory the initrd occupies must also be reserved
in the flat tree's reserve map, or the kernel may overwrite it.  That
makes life more complicated than it could be for the bootwrapper.

This patch makes the kernel automatically reserve the initrd's space.
That in turn requires parsing the initrd parameters earlier than they
are currently, in early_init_dt_scan_chosen() instead of
check_for_initrd().
Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      30437b3e
    • D
      [POWERPC] Allow duplicate lmb_reserve() calls · eb6de286
      由 David Gibson 提交于 
      At present calling lmb_reserve() (and hence lmb_add_region()) twice
for exactly the same memory region will cause strange behaviour.

This makes life difficult when booting from a flat device tree with
memory reserve map.  Which regions are automatically reserved by the
kernel has changed over time, so it's quite possible a newer kernel
could attempt to auto-reserve a region which is also explicitly listed
in the device tree's reserve map, leading to trouble.

This patch avoids the problem by making lmb_reserve() ignore a call to
reserve a previously reserved region.  It also removes a now redundant
test designed to avoid one specific case of the problem noted above.

At present, this patch deals only with duplicate reservations of an
identical region.  Attempting to reserve two different, but
overlapping regions will still cause problems.  I might post another
patch later dealing with this case, but I'm avoiding it now since it
is substantially more complicated to deal with, less likely to occur
and more likely to indicate a genuine bug elsewhere if it does occur.
Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      eb6de286
  29. 16 2月, 2007 1 次提交
  31. 13 2月, 2007 1 次提交
  33. 24 1月, 2007 1 次提交
  35. 11 12月, 2006 1 次提交
    • P
      [POWERPC] Support ibm,dynamic-reconfiguration-memory nodes · 0204568a
      由 Paul Mackerras 提交于 
      For PAPR partitions with large amounts of memory, the firmware has an
alternative, more compact representation for the information about the
memory in the partition and its NUMA associativity information.  This
adds the code to the kernel to parse this alternative representation.

The other part of this patch is telling the firmware that we can
handle the alternative representation.  There is however a subtlety
here, because the firmware will invoke a reboot if the memory
representation we request is different from the representation that
firmware is currently using.  This is because firmware can't change
the representation on the fly.  Further, some firmware versions used
on POWER5+ machines have a bug where this reboot leaves the machine
with an altered value of load-base, which will prevent any kernel
booting until it is reset to the normal value (0x4000).  Because of
this bug, we do NOT set fake_elf.rpanote.new_mem_def = 1, and thus we
do not request the new representation on POWER5+ and earlier machines.
We do request the new representation on POWER6, which uses the
ibm,client-architecture-support call.
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      0204568a
  37. 04 12月, 2006 1 次提交
    • P
      [POWERPC] Distinguish POWER6 partition modes and tell userspace · 974a76f5
      由 Paul Mackerras 提交于 
      This adds code to look at the properties firmware puts in the device
tree to determine what compatibility mode the partition is in on
POWER6 machines, and set the ELF aux vector AT_HWCAP and AT_PLATFORM
entries appropriately.

Specifically, we look at the cpu-version property in the cpu node(s).
If that contains a "logical" PVR value (of the form 0x0f00000x), we
call identify_cpu again with this PVR value.  A value of 0x0f000001
indicates the partition is in POWER5+ compatibility mode, and a value
of 0x0f000002 indicates "POWER6 architected" mode, with various
extensions disabled.  We also look for various other properties:
ibm,dfp, ibm,purr and ibm,spurr.
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      974a76f5
  39. 25 10月, 2006 2 次提交