1. 06 5月, 2008 16 次提交
    • M
      sata_mv use hweight16() for bit counting (V2) · c46938cc
      Mark Lord 提交于
      Some tidying as suggested by Grant Grundler.
      
      Nuke local bit-counting function from sata_mv in favour of using hweight16().
      Also add a short explanation for the 15msec timeout used when waiting for empty/idle.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      c46938cc
    • M
      sata_mv NCQ-EH for FIS-based switching · 4c299ca3
      Mark Lord 提交于
      Convert sata_mv's EH for FIS-based switching (FBS) over to the
      sequence recommended by Marvell.  This enables us to catch/analyze
      multiple failed links on a port-multiplier when using NCQ.
      
      To do this, we clear the ERR_DEV bit in the EDMA Halt-Conditions register,
      so that the EDMA engine doesn't self-disable on the first NCQ error.
      
      Our EH code sets the MV_PP_FLAG_DELAYED_EH flag to prevent new commands
      being queued while we await completion of all outstanding NCQ commands
      on all links of the failed PM.
      
      The SATA Test Control register tells us which links have failed,
      so we must only wait for any other active links to finish up
      before we stop the EDMA and run the .error_handler afterward.
      
      The patch also includes skeleton code for handling of non-NCQ FBS operation.
      This is more for documentation purposes right now, as that mode is not yet
      enabled in sata_mv.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      4c299ca3
    • M
      sata_mv delayed eh handling · 29d187bb
      Mark Lord 提交于
      Introduce a new "delayed error handling" mechanism in sata_mv,
      to enable us to eventually deal with multiple simultaneous NCQ
      failures on a single host link when a PM is present.
      
      This involves a port flag (MV_PP_FLAG_DELAYED_EH) to prevent new
      commands being queued, and a pmp bitmap to indicate which pmp links
      had NCQ errors.
      
      The new mv_pmp_error_handler() uses those values to invoke
      ata_eh_analyze_ncq_error() on each failed link, prior to freezing
      the port and passing control to sata_pmp_error_handler().
      
      This is based upon a strategy suggested by Tejun.
      
      For now, we just implement the delayed mechanism.
      The next patch in this series will add the multiple-NCQ EH code
      to take advantage of it.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      29d187bb
    • M
      libata: export ata_eh_analyze_ncq_error · 10acf3b0
      Mark Lord 提交于
      Export ata_eh_analyze_ncq_error() for subsequent use by sata_mv,
      as suggested by Tejun.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      10acf3b0
    • M
      sata_mv new mv_port_intr function · a9010329
      Mark Lord 提交于
      Separate out the inner loop body of mv_host_intr()
      into it's own function called mv_port_intr().
      
      This should help maintainabilty.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      a9010329
    • M
      sata_mv fix mv_host_intr bug for hc_irq_cause · eabd5eb1
      Mark Lord 提交于
      Remove the unwanted reads of hc_irq_cause from mv_host_intr(),
      thereby removing a bug whereby we were not always reading it when needed..
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      eabd5eb1
    • M
      sata_mv NCQ and SError fixes for mv_err_intr · 37b9046a
      Mark Lord 提交于
      Sigh.  Undo some earlier changes to mv_port_intr(),
      so that we now read/clear SError again in all cases.
      
      Arrange the top of the function to be as close as possible
      to what we need for a later update (in this series) for ERR_DEV handling.
      
      Fix things so that libata-eh can attempt a READ_LOG_EXT_10H
      in response to a failed NCQ command, by just doing a local
      mv_eh_freeze() rather than ata_port_freeze().
      
      This will now fully handle NCQ errors much of the time,
      but more fixes are needed for FBS/PMP, and for certain chip errata.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      37b9046a
    • M
      sata_mv rearrange mv_config_fbs · 00f42eab
      Mark Lord 提交于
      Rearrange mv_config_fbs() to more closely follow the (corrected) datasheet
      recommendations for NCQ and FIS-based switching (FBS).
      
      Also, maintain a port flag to let us know when FBS is enabled.
      We will make more use of that flag later in this patch series.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      00f42eab
    • M
      sata_mv errata workaround for sata25 part 1 · dd2890f6
      Mark Lord 提交于
      Part 1 of workaround for errata "sata#25" for the 60x1 series
      (the second half of this errata workaround is still in development.
      
      Bit22 of the GPIO port has to be set "on" when in NCQ mode.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      dd2890f6
    • M
      sata_mv new mv_qc_defer method · 3e4a1391
      Mark Lord 提交于
      The EDMA engine cannot tolerate a mix of NCQ/non-NCQ commands,
      and cannot be used for PIO at all.  So we need to prevent libata
      from trying to feed us such mixtures.
      
      Introduce mv_qc_defer() for this purpose, and use it for all chip versions.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      3e4a1391
    • M
      sata_mv wait for empty+idle · 9b2c4e0b
      Mark Lord 提交于
      When performing EH, it is recommended to wait for the EDMA engine
      to empty out requests-in-progress before disabling EDMA.
      
      Introduce code to poll the EDMA_STATUS register for idle/empty bits
      before disabling EDMA.  For non-EH operation, this will normally exit
      without delay, other than the register read.
      
      A later series of patches may focus on eliminating this and various
      other register reads (when possible) throughout the driver,
      but for now we're focussing on solid reliablity.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      9b2c4e0b
    • M
      sata_mv pci features · 616d4a98
      Mark Lord 提交于
      Some of the GenIIe EDMA optimizations should not be used
      for non-PCI (SOC) devices, and nor for certain configurations
      of conventional PCI (non PCI-X, PCIe) buses.
      
      Logic taken/simplified from that in the Marvell proprietary driver.
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      616d4a98
    • M
      sata_mv more cosmetic changes · 8e7decdb
      Mark Lord 提交于
      More cosmetic changes; no code changes.
      
       -- try and improve consistency of naming.
       -- add missing _OFS to tails of register offset definitions.
       -- rename mv_setup_ifctl() to mv_setup_ifcfg(), since that's what it really does.
       -- remove/move some dead comments
      Signed-off-by: NMark Lord <mlord@pobox.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      8e7decdb
    • A
      libata: Add Intel SCH PATA driver · 07ab85de
      Alek Du 提交于
      This patch adds Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L)
      PATA controller support.
      Signed-off-by: NAlek Du <alek.du@intel.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      07ab85de
    • T
      ata_piix: verify SIDPR access before enabling it · cb6716c8
      Tejun Heo 提交于
      On certain configurations (certain macbooks), even though all the
      conditions for SIDPR access described in the datasheet are met,
      actually reading those registers just returns 0 and have no effect on
      write.  Verify SIDPR is actually working before enabling it.
      
      This is reported by Ryan Roth in bz#10512.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Cc: Ryan Roth <ryan.roth@ch2m.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      cb6716c8
    • T
      libata: improve post-reset device ready test · 78ab88f0
      Tejun Heo 提交于
      Some controllers (jmb and inic162x) use 0x77 and 0x7f to indicate that
      the device isn't ready yet.  It looks like they use 0xff if device
      presence is detected but connection isn't established.  0x77 or 0x7f
      after connection is established and use the value from signature FIS
      after receiving it.
      
      This patch implements ata_check_ready(), which takes TF status value
      and determines whether the port is ready or not considering the above
      and other conditions, and use it in @check_ready() functions.  This is
      safe as both 0x77 and 0x7f aren't valid ready status value even though
      they have BSY bit cleared.
      
      This fixes hot plug detection failures which can be triggered with
      certain drives if they aren't already spun up when the data connector
      is hot plugged.
      
      Tested on sil, sil24, ahci (jmb/ich), piix and inic162x combined with
      eight drives from all major vendors.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
      78ab88f0
  2. 30 4月, 2008 4 次提交
  3. 29 4月, 2008 6 次提交
  4. 25 4月, 2008 14 次提交