- 13 3月, 2008 6 次提交
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由 Michael Ellerman 提交于
My recent hack to allocate the hash table under 1GB on cell was poorly tested, *cough*. It turns out on blades with large amounts of memory we fail to allocate the hash table at all. This is because RTAS has been instantiated just below 768MB, and 0-x MB are used by the kernel, leaving no areas that are both large enough and also naturally-aligned. For the cell IOMMU hack the page tables must be under 2GB, so use that as the limit instead. This has been tested on real hardware and boots happily. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Theodore Ts'o 提交于
Once again, this time with feeling.... - Ted >From c91cfaabc17f8a53807a2f31f067a732e34a1550 Mon Sep 17 00:00:00 2001 From: Theodore Ts'o <tytso@mit.edu> Date: Wed, 12 Mar 2008 11:50:39 -0400 Subject: Export empty_zero_page The empty_zero_page symbol is exported by most other architectures (s390, ia64, x86, um), and an upcoming ext4 patch needs it because ZERO_PAGE() references empty_zero_page, and we need it to zero out an unitialized extents in ext4 files. Signed-off-by: N"Theodore Ts'o" <tytso@mit.edu> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Tony Breeds 提交于
When building arch/powerpc/platforms/powermac/pic.c when !CONFIG_ADB_PMU we get the following warnings: arch/powerpc/platforms/powermac/pic.c: In function 'pmacpic_find_viaint': arch/powerpc/platforms/powermac/pic.c:623: warning: label 'not_found' defined but not used This fixes it. Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Benjamin Herrenschmidt 提交于
A bogus test for unassigned resources that came from our 32-bit PCI code ended up being "merged" by my previous patch series, breaking some 64-bit setups where devices have legal resources ending at 0xffffffff. This fixes it by completely changing the test. We now test for res->start == 0, as the generic code expects, and we also only do so on platforms that don't have the PPC_PCI_PROBE_ONLY flag set, as there are cases of pSeries and iSeries where it could be a valid value and those can't reassign devices. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Grant Likely 提交于
The pattern substitution rules were failing when used with zImage-dtb targets. If zImage-dtb.initrd was selected, the pattern substitution would generate "zImage.initrd-dtb" instead of "zImage-dtb.initrd" which caused the build to fail. This renames zImage-dtb to dtbImage to avoid the problem entirely. By not using the zImage prefix then is no potential for namespace collisions. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca> Acked-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Paul Mackerras 提交于
Some drivers (such as V4L2) have code that causes gcc to generate calls to __ucmpdi2 when compiling for 32-bit powerpc, which results in either a link-time error or a module that can't be loaded, as we don't currently have a __ucmpdi2. This adds one so these drivers can be used. Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 11 3月, 2008 3 次提交
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由 Jeremy Kerr 提交于
At present, we can hit the BUG_ON in __spu_update_sched_info by reading the regs file of a context between two calls to spu_run. The spu_release_saved called by spufs_regs_read() is resulting in the (now non-runnable) context being placed back on the run queue, so the next call to spu_run ends up in the bug condition. This change uses the SPU_SCHED_SPU_RUN flag to only reschedule a context if it's still in spu_run(). Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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由 Jeremy Kerr 提交于
commit 4ef11014 introduced a usage of SCHED_IDLE to detect when a context is within spu_run. Instead of SCHED_IDLE (which has other meaning), add a flag to sched_flags to tell if a context should be running. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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由 Ionut Nicu 提交于
The function was returning NULL the second time it was called if the firmware was uploaded from the boot loader or the first time it was called if the firmware was uploaded from the kernel. Signed-off-by: NIonut Nicu <ionut.nicu@freescale.com> Acked-By: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 10 3月, 2008 1 次提交
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由 Andy Fleming 提交于
Not all e300 cores support the performance monitors, and the ones that don't will be confused by the mf/mtpmr instructions. This allows the support to be optional, so the 8349 can turn it off while the 8379 can turn it on. Sadly, those aren't config options, so it will be left to the defconfigs and the users to make that determination. Signed-off-by: NAndy Fleming <afleming@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 08 3月, 2008 1 次提交
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由 Jeremy McNicoll 提交于
The following patch allows interrupts to occur on the sbc8548. Currently PCI and PCI-X devices get assigned an IRQ but the interrupt count never increases. This solves the problem and adds PCI support as well. Signed-off-by: NJeremy McNicoll <jeremy.mcnicoll@windriver.com> Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 07 3月, 2008 5 次提交
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由 Timur Tabi 提交于
Fix a typo in qe_upload_firmware() that prevented uploading firmware on systems with more than one RISC core. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Scott Wood 提交于
This fixes the following bug: http://ozlabs.org/pipermail/linuxppc-dev/2008-February/051979.html Separate defconfigs are no longer needed now that CONFIG_DEVICE_TREE is gone. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Vitaly Bordug 提交于
This makes swap routines operate correctly on the ppc_8xx based machines. Code has been revalidated on mpc885ads (8M sdram) with recent kernel. Based on patch from Yuri Tikhonov <yur@emcraft.com> to do the same on arch/ppc instance. Recent kernel's size makes swap feature very important on low-memory platforms, those are actually non-operable without it. Signed-off-by: NYuri Tikhonov <yur@emcraft.com> Signed-off-by: NVitaly Bordug <vitb@kernel.crashing.org> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Li Yang 提交于
Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Li Yang 提交于
Due to chip constraint MPC837x USB DR module can only use ULPI and serial PHY interfaces. The patch fixes the wrong type in dts. Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 05 3月, 2008 1 次提交
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Add CONFIG_HAVE_KRETPROBES to the arch/<arch>/Kconfig file for relevant architectures with kprobes support. This facilitates easy handling of in-kernel modules (like samples/kprobes/kretprobe_example.c) that depend on kretprobes being present in the kernel. Thanks to Sam Ravnborg for helping make the patch more lean. Per Mathieu's suggestion, added CONFIG_KRETPROBES and fixed up dependencies. Signed-off-by: NAnanth N Mavinakayanahalli <ananth@in.ibm.com> Acked-by: NMathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Acked-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 03 3月, 2008 11 次提交
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由 Michael Ellerman 提交于
The only tricky part is we need to adjust the PTE insertion loop to cater for holes in the page table. The PTEs for each segment start on a 4K boundary, so with 16M pages we have 16 PTEs per segment and then a gap to the next 4K page boundary. It might be possible to allocate the PTEs for each segment separately, saving the memory currently filling the gaps. However we'd need to check that's OK with the hardware, and that it actually saves memory. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Michael Ellerman 提交于
Make some preliminary changes to cell_iommu_alloc_ptab() to allow it to take the page size as a parameter rather than assuming IOMMU_PAGE_SIZE. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Michael Ellerman 提交于
We use n_pte_pages to calculate the stride through the page tables, but we also use it to set the NPPT value in the segment table entry. That is defined as the number of 4K pages per segment, so we should calculate it as such regardless of the IOMMU page size. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Michael Ellerman 提交于
Currently the cell IOMMU code allocates the entire IOMMU page table in a contiguous chunk. This is nice and tidy, but for machines with larger amounts of RAM the page table allocation can fail due to it simply being too large. So split the segment table and page table setup routine, and arrange to have the dynamic and fixed page tables allocated separately. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Michael Ellerman 提交于
There's no need to allocate the pad page unless we're going to actually use it - so move the allocation to where we know we're going to use it. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Michael Ellerman 提交于
The cell IOMMU code no longer needs to save the pte_offset variable separately, it is incorporated into tbl->it_offset. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Michael Ellerman 提交于
The cell IOMMU tce build and free routines use pte_offset to convert the index passed from the generic IOMMU code into a page table offset. This takes into account the SPIDER_DMA_OFFSET which sets the top bit of every DMA address. However it doesn't cater for the IOMMU window starting at a non-zero address, as the base of the window is not incorporated into pte_offset at all. As it turns out tbl->it_offset already contains the value we need, it takes into account the base of the window and also pte_offset. So use it instead! Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Michael Ellerman 提交于
It's called the fixed mapping, not the static mapping. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Jens Osterkamp 提交于
Ulrich Weigand has found that the hardware watchpoints on cell were not working back in November : http://ozlabs.org/pipermail/linuxppc-dev/2007-November/046135.html This patch sets them during initialization. Signed-off-by: NJens Osterkamp <jens@de.ibm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Jens Osterkamp 提交于
This moves the private DABRX definitions for celleb from beat.h to reg.h to make them usable for all. Signed-off-by: NJens Osterkamp <jens@de.ibm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Bob Nelson 提交于
This patch enables OProfile callgraph support for the Cell processor. The original code was just calling a function to add the PC value, now it will call a function that first checks the callgraph depth. Callgraph is already enabled on the other Power platforms. Signed-off-by: NBob Nelson <rrnelson@us.ibm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 29 2月, 2008 5 次提交
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由 Andre Detsch 提交于
The spu_runcntl_RW register is restored within spu_restore function. So, at the end of spu_bind_context, the SPU context is not just loaded, but running. This change corrects the state switch to account the time as USER. Signed-off-by: NAndre Detsch <adetsch@br.ibm.com> Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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由 Arnd Bergmann 提交于
There is a potential race between flushes of the entire SLB in the MFC and the point where new entries are being established. The problem is that we might put a ESID entry into the MFC SLB when the VSID entry has just been cleared by the global flush. This can be circumvented by holding the register_lock throughout both the flushing and the creation of SLB entries. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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由 Arnd Bergmann 提交于
When we replace an SLB entry in the MFC after using up all the available entries, there is a short window in which an incorrect entry is marked as valid. The problem is that the 'valid' bit is stored in the ESID, which is always written after the VSID. Overwriting the VSID first will make the original ESID entry point to the new VSID, which means that any concurrent DMA accessing the old ESID ends up being redirected to the new virtual address. A few cycles later, we write the new ESID and everything is fine again. That race can be closed by writing a zero entry to the ESID first, which makes sure that the VSID is not accessed until we write the new ESID. Note that we don't actually need to invalidate the SLB entry using the invalidation register, which would also flush any ERAT entries for that segment, because the segment translation does not become invalid but is only removed from the SLB cache. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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由 Arnd Bergmann 提交于
There is a small race between the context save procedure and the SPU interrupt handling, where we expect all interrupt processing to have finished after disabling them, while an interrupt is still being processed on another CPU. The obvious fix is to call synchronize_irq() after disabling the interrupts at the start of the context save procedure to make sure we never access the SPU any more during an ongoing save or even after that. Thanks to Benjamin Herrenschmidt for pointing this out. Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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由 Jeremy Kerr 提交于
Currently, we get the following output from sputrace: [5.097935954] 1606: spufs_ps_nopfn__enter (thread = 1605, spu = -1) [5.097958164] 1606: spufs_ps_nopfn__insert (thread = 1605, spu = 15) [5.097973529] 1607: spufs_ps_nopfn__enter (thread = 1605, spu = -1) [5.097989174] 1607: spufs_ps_nopfn__insert (thread = 1605, spu = 14) Which leads me to believe that 160[67] is the current thread ID, and 1605 is the context backing the psmap. However, the 'current' and 'owner' tids are reversed - the 'current' tid is on the right. This change puts the current thread ID in the left-hand column instead, and renames the right to 'ctxthread'. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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- 28 2月, 2008 2 次提交
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由 Josh Boyer 提交于
Correct the remaining 44x cuboot wrappers to define TARGET_4xx as well. This creates the correct structure to use, including things like the second MAC address. Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Jeremy Kerr 提交于
At present, we have a situation where a context with no owner is re-scheduled by spu_forget: Thread 1: reading regs file Thread 2: context owner spu_forget() - ctx->owner = NULL - set SPU_SCHED_WAS_ACTIVE spu_acquire_saved() - context is in saved state spu_release_saved() - SPU_SCHED_WAS_ACTIVE is set, so spu_activate() the context, which now has no owner In spu_forget(), we shouldn't be requesting a re-schedule by setting SPU_SCHED_WAS_ACTIVE. This change removes the set_bit in spu_forget(), so that spu_release_saved() doesn't reinsert this destroyed context on to the run queue. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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- 27 2月, 2008 4 次提交
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由 Valentine Barshak 提交于
In order to get the proper boad info (bd_info) structure defined in ppcboot.h both TARGET_4xx and TARGET_44x should be defined for all PowerPC 440 boards. The 440GX boards also need TARGET_440GX defined since they have 4 EMACs and there are 4 MAC addesses in bd_info passed by u-boot. Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Stefan Roese 提交于
This patch changes the katmai (440SPe) L1 cache size to 32k. Some whitespace issues are cleaned up too. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Stefan Roese 提交于
Since the 4xx PCIe driver checks for 405ex compatibility, the PCIe interface was not detected as it is currently defined as "405exr" compatible. This patch changes it to "405ex". The 405EX and 405EXr are identical exept that the 2nd PCIe and the 2nd EMAC interfaces are missing. Signed-off-by: NStefan Roese <sr@denx.de> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Jeremy Kerr 提交于
We have a small window where a spu context may be destroyed while we're servicing a page fault (from another thread) to the context's problem state mapping. After we up_read() the mmap_sem, it's possible that the context is destroyed by its owning thread, and so the later references to ctx are invalid. This can maifest as a deadlock on the (now free()-ed) context state mutex. This change adds a reference to the context before we release the mmap_sem, so that the context cannot be destroyed. Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
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- 24 2月, 2008 1 次提交
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由 Eric Dujardin 提交于
mpc52xx_set_psc_clkdiv is needed by PSC device drivers. Signed-off-by: NEric Dujardin <eric.dujardin@sagem.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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