zynq_slcr_cpu_start/stop() ignored the current register state when
writing to a register. Fixing this by implementing proper
read-modify-write.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Use a common naming scheme for register offset #defines:
Some of those used a '_OFFSET' suffix to distinguish them from others.
This scheme is used for all register offsets now.

Separate the register offset #defines from others and sort them in
increasing order.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Migrate the Zynq platform and its drivers to use the new clock
controller driver.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: linux-serial@vger.kernel.org
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NMike Turquette <mturquette@linaro.org>

Zynq is dual core Cortex A9 which starts always
at zero. Using simple trampoline ensure long jump
to secondary_startup code.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>

Do system reset via slcr registers.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Create separate slcr driver instead of polluting common code.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>