1. 21 7月, 2007 1 次提交
  2. 20 7月, 2007 8 次提交
    • T
      [IA64] refresh some config files for 64K pagesize · ffc72040
      Tony Luck 提交于
      Update arch/ia64/defconfig: select 64K pagesize
      Same for arch/ia64/configs/tiger_defconfig + CONFIG_COMPAT=n
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      ffc72040
    • Y
      [IA64] Delete iosapic_free_rte() · bf903d0a
      Yasuaki Ishimatsu 提交于
      >   arch/ia64/kernel/iosapic.c:597: warning: 'iosapic_free_rte' defined but not used
      >
      > This isn't spurious, the only call to iosapic_free_rte() has been removed, but there
      > is still a call to iosapic_alloc_rte() ... which means we must have a memory leak.
      
      I did it on purpose (and gave the warning a miss...) and I consider
      iosapic_free_rte() is no longer needed.
      
      I decided to remain iosapic_rte_info to keep gsi-to-irq binding
      after device disable. Indeed it needs some extra memory, but it
      is only "sizeof(iosapic_rte_info) * <the number of removed devices>"
      bytes and has no memory leak becasue re-enabled devices use the
      iosapic_rte_info which they used before disabling.
      Signed-off-by: NYasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      bf903d0a
    • D
      [IA64] fallocate system call · 3d7559e6
      David Chinner 提交于
      sys_fallocate for ia64. This uses an empty slot #1303 erroneously
      marked as reserved for move_pages (which had already been allocated
      as syscall #1276)
      Signed-Off-By: NDave Chinner <dgc@sgi.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      3d7559e6
    • O
      mm: variable length argument support · b6a2fea3
      Ollie Wild 提交于
      Remove the arg+env limit of MAX_ARG_PAGES by copying the strings directly from
      the old mm into the new mm.
      
      We create the new mm before the binfmt code runs, and place the new stack at
      the very top of the address space.  Once the binfmt code runs and figures out
      where the stack should be, we move it downwards.
      
      It is a bit peculiar in that we have one task with two mm's, one of which is
      inactive.
      
      [a.p.zijlstra@chello.nl: limit stack size]
      Signed-off-by: NOllie Wild <aaw@google.com>
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: <linux-arch@vger.kernel.org>
      Cc: Hugh Dickins <hugh@veritas.com>
      [bunk@stusta.de: unexport bprm_mm_init]
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      b6a2fea3
    • F
      use the new percpu interface for shared data · f34e3b61
      Fenghua Yu 提交于
      Currently most of the per cpu data, which is accessed by different cpus,
      has a ____cacheline_aligned_in_smp attribute.  Move all this data to the
      new per cpu shared data section: .data.percpu.shared_aligned.
      
      This will seperate the percpu data which is referenced frequently by other
      cpus from the local only percpu data.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Acked-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f34e3b61
    • F
      define new percpu interface for shared data · 5fb7dc37
      Fenghua Yu 提交于
      per cpu data section contains two types of data.  One set which is
      exclusively accessed by the local cpu and the other set which is per cpu,
      but also shared by remote cpus.  In the current kernel, these two sets are
      not clearely separated out.  This can potentially cause the same data
      cacheline shared between the two sets of data, which will result in
      unnecessary bouncing of the cacheline between cpus.
      
      One way to fix the problem is to cacheline align the remotely accessed per
      cpu data, both at the beginning and at the end.  Because of the padding at
      both ends, this will likely cause some memory wastage and also the
      interface to achieve this is not clean.
      
      This patch:
      
      Moves the remotely accessed per cpu data (which is currently marked
      as ____cacheline_aligned_in_smp) into a different section, where all the data
      elements are cacheline aligned. And as such, this differentiates the local
      only data and remotely accessed data cleanly.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Acked-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: <linux-arch@vger.kernel.org>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      5fb7dc37
    • M
      jprobes: make jprobes a little safer for users · 3d7e3382
      Michael Ellerman 提交于
      I realise jprobes are a razor-blades-included type of interface, but that
      doesn't mean we can't try and make them safer to use.  This guy I know once
      wrote code like this:
      
      struct jprobe jp = { .kp.symbol_name = "foo", .entry = "jprobe_foo" };
      
      And then his kernel exploded. Oops.
      
      This patch adds an arch hook, arch_deref_entry_point() (I don't like it
      either) which takes the void * in a struct jprobe, and gives back the text
      address that it represents.
      
      We can then use that in register_jprobe() to check that the entry point we're
      passed is actually in the kernel text, rather than just some random value.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Cc: Prasanna S Panchamukhi <prasanna@in.ibm.com>
      Acked-by: NAnanth N Mavinakayanahalli <ananth@in.ibm.com>
      Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Cc: David S. Miller <davem@davemloft.net>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      3d7e3382
    • N
      mm: fault feedback #2 · 83c54070
      Nick Piggin 提交于
      This patch completes Linus's wish that the fault return codes be made into
      bit flags, which I agree makes everything nicer.  This requires requires
      all handle_mm_fault callers to be modified (possibly the modifications
      should go further and do things like fault accounting in handle_mm_fault --
      however that would be for another patch).
      
      [akpm@linux-foundation.org: fix alpha build]
      [akpm@linux-foundation.org: fix s390 build]
      [akpm@linux-foundation.org: fix sparc build]
      [akpm@linux-foundation.org: fix sparc64 build]
      [akpm@linux-foundation.org: fix ia64 build]
      Signed-off-by: NNick Piggin <npiggin@suse.de>
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Ian Molton <spyro@f2s.com>
      Cc: Bryan Wu <bryan.wu@analog.com>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Hirokazu Takata <takata@linux-m32r.org>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Roman Zippel <zippel@linux-m68k.org>
      Cc: Greg Ungerer <gerg@uclinux.org>
      Cc: Matthew Wilcox <willy@debian.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
      Cc: Richard Curnow <rc@rc0.org.uk>
      Cc: William Lee Irwin III <wli@holomorphy.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
      Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp>
      Cc: Chris Zankel <chris@zankel.net>
      Acked-by: NKyle McMartin <kyle@mcmartin.ca>
      Acked-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      Acked-by: NRalf Baechle <ralf@linux-mips.org>
      Acked-by: NAndi Kleen <ak@muc.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      [ Still apparently needs some ARM and PPC loving - Linus ]
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      83c54070
  3. 18 7月, 2007 16 次提交
  4. 17 7月, 2007 3 次提交
    • V
      diskquota: 32bit quota tools on 64bit architectures · b716395e
      Vasily Tarasov 提交于
      OpenVZ Linux kernel team has discovered the problem with 32bit quota tools
      working on 64bit architectures.  In 2.6.10 kernel sys32_quotactl() function
      was replaced by sys_quotactl() with the comment "sys_quotactl seems to be
      32/64bit clean, enable it for 32bit" However this isn't right.  Look at
      if_dqblk structure:
      
      struct if_dqblk {
              __u64 dqb_bhardlimit;
              __u64 dqb_bsoftlimit;
              __u64 dqb_curspace;
              __u64 dqb_ihardlimit;
              __u64 dqb_isoftlimit;
              __u64 dqb_curinodes;
              __u64 dqb_btime;
              __u64 dqb_itime;
              __u32 dqb_valid;
      };
      
      For 32 bit quota tools sizeof(if_dqblk) == 0x44.
      But for 64 bit kernel its size is 0x48, 'cause of alignment!
      Thus we got a problem. Attached patch reintroduce sys32_quotactl() function,
      that handles this and related situations.
      
      [michal.k.k.piotrowski@gmail.com: build fix]
      [akpm@linux-foundation.org: Make it link with CONFIG_QUOTA=n]
      Signed-off-by: NVasily Tarasov <vtaras@openvz.org>
      Cc: Andi Kleen <ak@suse.de>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Jan Kara <jack@ucw.cz>
      Cc: <linux-arch@vger.kernel.org>
      Signed-off-by: NMichal Piotrowski <michal.k.k.piotrowski@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      b716395e
    • J
      PIE randomization · 60bfba7e
      Jan Kratochvil 提交于
      This patch is using mmap()'s randomization functionality in such a way that
      it maps the main executable of (specially compiled/linked -pie/-fpie)
      ET_DYN binaries onto a random address (in cases in which mmap() is allowed
      to perform a randomization).
      
      Origin of this patch is in exec-shield
      (http://people.redhat.com/mingo/exec-shield/)
      
      [jkosina@suse.cz: pie randomization: fix BAD_ADDR macro]
      Signed-off-by: NJan Kratochvil <honza@jikos.cz>
      Signed-off-by: NJiri Kosina <jkosina@suse.cz>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Roland McGrath <roland@redhat.com>
      Cc: Jakub Jelinek <jakub@redhat.com>
      Signed-off-by: NJiri Kosina <jkosina@suse.cz>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      60bfba7e
    • Y
      serial: convert early_uart to earlycon for 8250 · 18a8bd94
      Yinghai Lu 提交于
      Beacuse SERIAL_PORT_DFNS is removed from include/asm-i386/serial.h and
      include/asm-x86_64/serial.h.  the serial8250_ports need to be probed late in
      serial initializing stage.  the console_init=>serial8250_console_init=>
      register_console=>serial8250_console_setup will return -ENDEV, and console
      ttyS0 can not be enabled at that time.  need to wait till uart_add_one_port in
      drivers/serial/serial_core.c to call register_console to get console ttyS0.
      that is too late.
      
      Make early_uart to use early_param, so uart console can be used earlier.  Make
      it to be bootconsole with CON_BOOT flag, so can use console handover feature.
      and it will switch to corresponding normal serial console automatically.
      
      new command line will be:
      	console=uart8250,io,0x3f8,9600n8
      	console=uart8250,mmio,0xff5e0000,115200n8
      or
      	earlycon=uart8250,io,0x3f8,9600n8
      	earlycon=uart8250,mmio,0xff5e0000,115200n8
      
      it will print in very early stage:
      	Early serial console at I/O port 0x3f8 (options '9600n8')
      	console [uart0] enabled
      later for console it will print:
      	console handover: boot [uart0] -> real [ttyS0]
      
      Signed-off-by: <yinghai.lu@sun.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Gerd Hoffmann <kraxel@suse.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      18a8bd94
  5. 14 7月, 2007 4 次提交
    • T
      [IA64] Clean away some code inside some non-existent CONFIG ifdefs · 4f8de274
      Tony Luck 提交于
      Robert P.J. Day has a script that finds places in the code that
      use non-existent CONFIG variables.  It complained of two uses in
      ia64 specific code: CONFIG_IA64_SDV and CONFIG_KDB (both used in
      the hp/sim code).
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      4f8de274
    • H
      [IA64] ar.itc access must really be after xtime_lock.sequence has been read · 829a9996
      Hidetoshi Seto 提交于
      The ".acq" semantics of the load only apply w.r.t. other data access.
      Reading the clock (ar.itc) isn't a data access so strange things can
      happen here.  Specifically the read of ar.itc can be launched as soon
      as the read of xtime_lock.sequence is ISSUED.  Since this may cache
      miss, and that might cause a thread switch, and there may be cache
      contention for the line containing xtime_lock, it may be a long time
      before the actual value is returned, so the ar.itc value may be very
      stale.
      
      Move the consumption of r28 up before the read of ar.itc to make sure
      that we really have got the current value of xtime_lock.sequence
      before look at ar.itc.
      Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      829a9996
    • M
      [IA64] correctly count CPU objects in the ia64/sn hwperf interface · 83e12a07
      Mark Goodwin 提交于
      Correctly count CPU objects for SGI ia64/sn hwperf interface
      Signed-off-by: NMark Goodwin <markgw@sgi.com>
      Signed-off-by: NJack Steiner <steiner@sgi.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      83e12a07
    • T
      [IA64] use machvec=dig on hpzx1 platforms · 51b58e3e
      Terry Loftin 提交于
      On HP zx1 machines, the 'machvec=dig' parameter is needed for the
      kdump kernel to avoid problems with the HP sba iommu.  The problem
      is that during the boot of the kdump kernel, the iommu is re-initialized,
      so in-flight DMA from improperly shutdown drivers causes an IOTLB
      miss which leads to an MCA.  With kdump, the idea is to get into the
      kdump kernel with as little code as we can, so shutting down drivers
      properly is not an option.
      
      The workaround is to add 'machvec=dig' to the kdump kernel boot
      parameters.  This makes the kdump kernel avoid using the sba iommu
      altogether, leaving the IOTLB intact.  Any ongoing DMA falls
      harmlessly outside the kdump kernel.  After the kdump kernel reboots,
      all devices will have been shutdown properly and DMA stopped.
      
      This patch pushes that functionality into the sba iommu
      initialization code, so that users won't have to find the obscure
      documentation telling them about 'machvec=dig'.
      
      This patch only affects HP platforms.  It still includes one
      extern declaration in the file, because no applicable header file
      exists.
      Signed-off-by: NTerry Loftin <terry.loftin@hp.com>
      Signed-off-by: NAlex Williamson <alex.williamson@hp.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      51b58e3e
  6. 12 7月, 2007 4 次提交
    • M
      PCI: Only build PCI syscalls on architectures that want them · 36e23590
      Matthew Wilcox 提交于
      The PCI syscalls are built on every architecture except X86, but only
      a few have ever hooked them up.  Use a new Kconfig symbol to save a
      couple of kB on the architectures that have never used the syscalls.
      Tested on x86 and ia64 only.
      Signed-off-by: NMatthew Wilcox <matthew@wil.cx>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      36e23590
    • R
      [IA64] Support multiple CPUs going through OS_MCA · 1612b18c
      Russ Anderson 提交于
      Linux does not gracefully deal with multiple processors going
      through OS_MCA aa part of the same MCA event.  The first cpu
      into OS_MCA grabs the ia64_mca_serialize lock.  Subsequent
      cpus wait for that lock, preventing them from reporting in as
      rendezvoused.  The first cpu waits 5 seconds then complains
      that all the cpus have not rendezvoused.  The first cpu then
      handles its MCA and frees up all the rendezvoused cpus and
      releases the ia64_mca_serialize lock.  One of the subsequent
      cpus going thought OS_MCA then gets the ia64_mca_serialize
      lock, waits another 5 seconds and then complains that none of
      the other cpus have rendezvoused.
      
      This patch allows multiple CPUs to gracefully go through OS_MCA.
      
      The first CPU into ia64_mca_handler() grabs a mca_count lock.
      Subsequent CPUs into ia64_mca_handler() are added to a list of cpus
      that need to go through OS_MCA (a bit set in mca_cpu), and report
      in as rendezvoused, and but spin waiting their turn.
      
      The first CPU sees everyone rendezvous, handles his MCA, wakes up
      one of the other CPUs waiting to process their MCA (by clearing
      one mca_cpu bit), and then waits for the other cpus to complete
      their MCA handling.  The next CPU handles his MCA and the process
      repeats until all the CPUs have handled their MCA.  When the last
      CPU has handled it's MCA, it sets monarch_cpu to -1, releasing all
      the CPUs.
      
      In testing this works more reliably and faster.
      
      Thanks to Keith Owens for suggesting numerous improvements
      to this code.
      Signed-off-by: NRuss Anderson <rja@sgi.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      1612b18c
    • J
      [IA64] silence GCC ia64 unused variable warnings · 256a7e09
      Jes Sorensen 提交于
      Tell GCC to stop spewing out unnecessary warnings for unused variables
      passed to functions as pointers for ia64 files.
      Signed-off-by: NJes Sorensen <jes@sgi.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      256a7e09
    • A
      [IA64] prevent MCA when performing MMIO mmap to PCI config space · 012b7105
      Alex Chiang 提交于
      Example memory map (HP rx7640 with 'default' acpiconfig setting, VGA disabled):
         0x00000000 - 0x3FFFBFFF  supports only WB (cacheable) access
      
      If a user attempts to perform an MMIO mmap (using the PCIIOC_MMAP_IS_MEM ioctl)
      to PCI config space (like mmap'ing and accessing memory at 0xA0000),
      we will MCA because the kernel will attempt to use a mapping with the UC
      attribute.
      
      So check the memory attribute in kern_mmap and the EFI memmap. If WC is
      requested, and WC or UC access is supported for the region, allow it.
      Otherwise, use the same attribute the kernel uses.
      
      Updates documentation and test cases as well.
      Signed-off-by: NAlex Chiang <achiang@hp.com>
      Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      012b7105
  7. 10 7月, 2007 4 次提交