- 29 3月, 2015 1 次提交
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由 Joachim Eastwood 提交于
This patch makes it possible to enter zImage in Thumb mode for ARMv7-M (Cortex-M) CPUs that do not support ARM mode. The kernel entry is also made in Thumb mode. [ukl: fix spelling in commit log, return early in call_cache_fn] Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Tested-by: NStefan Agner <stefan@agner.ch> Tested-by: NEzequiel Garcia <ezequiel@vanguardiasur.com.ar> Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 3月, 2015 5 次提交
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由 Ard Biesheuvel 提交于
When running the 32-bit ARM kernel on ARMv8 capable bare metal (e.g., 32-bit Android userland and kernel on a Cortex-A53), or as a KVM guest on a 64-bit host, we should advertise the availability of the Crypto instructions, so that userland libraries such as OpenSSL may use them. (Support for the v8 Crypto instructions in the 32-bit build was added to OpenSSL more than six months ago) This adds the ID feature bit detection, and sets elf_hwcap2 accordingly. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Ard Biesheuvel 提交于
The various CPU feature registers consist of 4-bit blocks that represent signed quantities, whose positive values represent incremental features, and whose negative values are reserved. To improve forward compatibility, update the feature detection code to take possible future higher values into account, but ignore negative values. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Ard Biesheuvel 提交于
This moves the .idmap.text section closer to .head.text, so that relative branches are less likely to go out of range if the kernel text gets bigger. Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Ard Biesheuvel 提交于
This patch replaces the 'branch to setup()' instructions embedded in the PROCINFO structs with the offset to that setup function relative to the base of the struct. This preserves the position independent nature of that field, but uses a data item rather than an instruction. This is mainly done to prevent linker failures on large kernels, where the setup function is out of reach for the branch. Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Occasionally, there's a question about the method we use to find the start of physical memory. Add some documentation so we don't have to keep repeating outselves on the mailing list. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 18 3月, 2015 1 次提交
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由 Will Deacon 提交于
When using the IOMMU-backed DMA ops for a device, we store a pointer to the dma_iommu_mapping structure (used to keep track of the address space) in the archdata.mapping field of the struct device. Rather than access this field directly, use the to_dma_iommu_mapping helper in dma-mapping, so that we don't really care where the mapping information is held. Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 10 3月, 2015 1 次提交
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由 Florian Fainelli 提交于
Make sure that we can read the "cache-level" property from the L2 cache controller node, and ensure its value is 2. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 2月, 2015 1 次提交
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由 Russell King 提交于
SMP_ON_UP has been around for a while, and seems to be well-proven now. Drop the EXPERIMENTAL tag from the option. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 2月, 2015 4 次提交
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由 Carlo Caione 提交于
Even without an iommu, NO_KERNEL_MAPPING is still convenient to save on kernel address space in places where we don't need a kernel mapping. Implement support for it in the two places where we're creating an expensive mapping. __alloc_from_pool uses an internal pool from which we already have virtual addresses, so it's not relevant, and __alloc_simple_buffer uses alloc_pages, which will always return a lowmem page, which is already mapped into kernel space, so we can't prevent a mapping for it in that case. Signed-off-by: NJasper St. Pierre <jstpierre@mecheye.net> Signed-off-by: NCarlo Caione <carlo@caione.org> Reviewed-by: NRob Clark <robdclark@gmail.com> Reviewed-by: NDaniel Drake <dsd@endlessm.com> Acked-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Lorenzo Pieralisi 提交于
The pci_mmap_page_range() API should be written to expect offset values representing PCI memory resource addresses as seen by user space, through the pci_resource_to_user() API. ARM relies on the standard implementation of pci_resource_to_user() which actually is an identity map and exports to user space PCI memory resources as they are stored in PCI devices resources structures, which represent CPU physical addresses (fixed-up using BUS to CPU address conversions) not PCI bus addresses. Therefore, on ARM platforms where the mapping between CPU and BUS address is not a 1:1 the current pci_mmap_page_range() implementation is erroneous, in that an additional shift is applied to an already fixed-up offset passed from userspace. Hence, this patch removes the mem_offset from the pgoff calculation since the offset as passed from user space already represents the CPU physical address corresponding to the resource to be mapped, ie no additional offset should be applied. Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Ard Biesheuvel 提交于
Currently, interworking calls on module boundaries are not supported, and are handled by the same error handling code path as non-interworking calls whose targets are simply out of range. Before modifying the handling of those out-of-range jump and call relocations in a subsequent patch, move the handling of interworking restrictions out of it. Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 David Howells 提交于
Convert the following where appropriate: (1) S_ISLNK(dentry->d_inode) to d_is_symlink(dentry). (2) S_ISREG(dentry->d_inode) to d_is_reg(dentry). (3) S_ISDIR(dentry->d_inode) to d_is_dir(dentry). This is actually more complicated than it appears as some calls should be converted to d_can_lookup() instead. The difference is whether the directory in question is a real dir with a ->lookup op or whether it's a fake dir with a ->d_automount op. In some circumstances, we can subsume checks for dentry->d_inode not being NULL into this, provided we the code isn't in a filesystem that expects d_inode to be NULL if the dirent really *is* negative (ie. if we're going to use d_inode() rather than d_backing_inode() to get the inode pointer). Note that the dentry type field may be set to something other than DCACHE_MISS_TYPE when d_inode is NULL in the case of unionmount, where the VFS manages the fall-through from a negative dentry to a lower layer. In such a case, the dentry type of the negative union dentry is set to the same as the type of the lower dentry. However, if you know d_inode is not NULL at the call site, then you can use the d_is_xxx() functions even in a filesystem. There is one further complication: a 0,0 chardev dentry may be labelled DCACHE_WHITEOUT_TYPE rather than DCACHE_SPECIAL_TYPE. Strictly, this was intended for special directory entry types that don't have attached inodes. The following perl+coccinelle script was used: use strict; my @callers; open($fd, 'git grep -l \'S_IS[A-Z].*->d_inode\' |') || die "Can't grep for S_ISDIR and co. callers"; @callers = <$fd>; close($fd); unless (@callers) { print "No matches\n"; exit(0); } my @cocci = ( '@@', 'expression E;', '@@', '', '- S_ISLNK(E->d_inode->i_mode)', '+ d_is_symlink(E)', '', '@@', 'expression E;', '@@', '', '- S_ISDIR(E->d_inode->i_mode)', '+ d_is_dir(E)', '', '@@', 'expression E;', '@@', '', '- S_ISREG(E->d_inode->i_mode)', '+ d_is_reg(E)' ); my $coccifile = "tmp.sp.cocci"; open($fd, ">$coccifile") || die $coccifile; print($fd "$_\n") || die $coccifile foreach (@cocci); close($fd); foreach my $file (@callers) { chomp $file; print "Processing ", $file, "\n"; system("spatch", "--sp-file", $coccifile, $file, "--in-place", "--no-show-diff") == 0 || die "spatch failed"; } [AV: overlayfs parts skipped] Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 21 2月, 2015 2 次提交
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由 Niklas Cassel 提交于
Commit e9de688d ("irqchip: mips-gic: Support local interrupts") updated several platforms. This is a copy paste error. Signed-off-by: NNiklas Cassel <niklass@axis.com> Reviewed-by: NAndrew Bresticker <abrestic@chromium.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9245/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Andreas Ruprecht 提交于
In commit c441d4a5 ("MIPS: mm: Only build one microassembler that is suitable"), the Makefile at arch/mips/mm was rewritten to only build the "right" microassembler file, depending on whether CONFIG_CPU_MICROMIPS is set or not. In the files, however, there are still preprocessor definitions depending on CONFIG_CPU_MICROMIPS. The #ifdef around them can now never evaluate to true, so let's remove them altogether. This inconsistency was found using the undertaker-checkpatch tool. Signed-off-by: NAndreas Ruprecht <rupran@einserver.de> Reviewed-by: NMaciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Valentin Rothberg <valentinrothberg@gmail.com> Cc: Paul Bolle <pebolle@tiscali.nl> Patchwork: https://patchwork.linux-mips.org/patch/9267/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 20 2月, 2015 25 次提交
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由 David Daney 提交于
- Use of_irq_init() to initialize interrupt controllers - Get rid of some unlikely() - Add CIB to support SATA and other interrupts - Add support for CIU SUM2 interrupt sources Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLeonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: NPeter Swain <peter.swain@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8947/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The acknowledge bits don't exist for level triggered irqs, so setting them causes the simulator to terminate. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLeonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8946/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Chandrakala Chavva 提交于
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII. Signed-off-by: NChandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8945/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Chad Reese 提交于
CN38XX pass 1 required icache prefetching to be turned off. This chip never reached production and is long dead. Other processor specific icache settings are done by the bootloader. Remove these bits from the kernel. Signed-off-by: NChad Reese <kreese@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8944/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8943/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Add coverage for OCTEON III models. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8942/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Make messages refer to all CN6XXX. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8941/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Also update union octeon_cvmemctl with new OCTEON II fields. [aleksey.makarov@auriga.com: use __BITFIELD_FIELD] Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8940/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Disable ICache prefetch for certian Octeon II processors. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8938/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Aleksey Makarov 提交于
Commit 2c952e06 ("MIPS: Move cop2 save/restore to switch_to()") removes assembler code to store COP2 registers. Commit a36d8225 ("MIPS: OCTEON: Enable use of FPU") mistakenly restores it Fixes: a36d8225 ("MIPS: OCTEON: Enable use of FPU") Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8937/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Chandrakala Chavva 提交于
Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register, its a 64-bit wide. Signed-off-by: NChandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8936/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Allocate new save space, and then save/restore the registers if OCTEON III. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8935/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
It wasn't being saved on task switch. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8934/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The wide multiplier is twice as wide, so we need to save twice as much state. Detect the multiplier type (CPU type) at start up and install model specific handlers. [aleksey.makarov@auriga.com: conflict resolution, support for old compilers] Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLeonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8933/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Markos Chandras 提交于
Allow more compression algorithms as well as uncompressed uImage.bin to be generated. An uncompressed image might be useful to rule out problems in the decompression code in the bootloader or even speed up the boot process at the expense of a bigger uImage file. Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9271/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8737/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Lars-Peter Clausen 提交于
There are currently no gio device drivers that implement suspend/resume and this patch removes the bus specific legacy suspend and resume callbacks. This will allow us to eventually remove struct bus_type legacy suspend and resume support altogether. gio device drivers wanting to implement suspend and resume can use dev PM ops which will work out of the box without further modifications necessary. Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Acked-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8920/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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Without these, there are multiple definitions of pci_proc_domain() and pci_domain_nr() if linux/pci.h and asm/pci.h are included. Add #ifdefs around them Signed-off-by: NZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: NMarkos Chandras <Markos.Chandras@imgtec.com> Cc: Markos.Chandras@imgtec.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8670/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Manuel Lauss 提交于
The current code uses bits 0-6 of the sys_cpupll register to calculate core clock speed. However this is only valid on Au1300, on all earlier models the hardware only uses bits 0-5 to generate core clock. This fixes clock calculation on the MTX1 (Au1500), where bit 6 of cpupll is set as well, which ultimately lead the code to calculate a bogus cpu core clock and also uart base clock down the line. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Reported-by: NJohn Crispin <blogic@openwrt.org> Tested-by: NBruno Randolf <br1@einfach.org> Cc: stable@vger.kernel.org [v3.17+] Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9279/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Manuel Lauss 提交于
set_cpuspec() has been dropped with commit 074cf656 ("MIPS: Alchemy: remove cpu_table.") in late 2008. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9150/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Manuel Lauss 提交于
This was lost during the rewrite of clock framework support. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9149/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Manuel Lauss 提交于
The Au1000 and Au1500 calculate the LRCLK a bit differently than newer models: a single bit in MEM_STCFG0 selects if pclk is divided by 4 or 5. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9148/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Steven J. Hill 提交于
Build set and clear macros for the PageGrain register. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9289/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Alexandre Courbot 提交于
There doesn't seem to be any valid reason to allocate the pages array with the same flags as the buffer itself. Doing so can eventually lead to the following safeguard in mm/slab.c's cache_grow() to be hit: if (unlikely(flags & GFP_SLAB_BUG_MASK)) { pr_emerg("gfp: %un", flags & GFP_SLAB_BUG_MASK); BUG(); } This happens when buffers are allocated with __GFP_DMA32 or __GFP_HIGHMEM. Fix this by allocating the pages array with GFP_KERNEL to follow what is done elsewhere in this file. Using GFP_KERNEL in __iommu_alloc_buffer() is safe because atomic allocations are handled by __iommu_alloc_atomic(). Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: NMarek Szyprowski <m.szyprowski@samsung.com> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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