- 18 4月, 2017 1 次提交
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由 Grygorii Strashko 提交于
Now the command: ethtool --phy-statistics eth0 will cause system crash with meassage "Unable to handle kernel NULL pointer dereference at virtual address 00000010" from: (kszphy_get_stats) from [<c069f1d8>] (ethtool_get_phy_stats+0xd8/0x210) (ethtool_get_phy_stats) from [<c06a0738>] (dev_ethtool+0x5b8/0x228c) (dev_ethtool) from [<c06b5484>] (dev_ioctl+0x3fc/0x964) (dev_ioctl) from [<c0679f7c>] (sock_ioctl+0x170/0x2c0) (sock_ioctl) from [<c02419d4>] (do_vfs_ioctl+0xa8/0x95c) (do_vfs_ioctl) from [<c02422c4>] (SyS_ioctl+0x3c/0x64) (SyS_ioctl) from [<c0107d60>] (ret_fast_syscall+0x0/0x44) The reason: phy_driver structure for KSZ9031 phy has no .probe() callback defined. As result, struct phy_device *phydev->priv pointer will not be initializes (null). This issue will affect also following phys: KSZ8795, KSZ886X, KSZ8873MLL, KSZ9031, KSZ9021, KSZ8061, KS8737 Fix it by: - adding .probe() = kszphy_probe() callback to KSZ9031, KSZ9021 phys. The kszphy_probe() can be re-used as it doesn't do any phy specific settings. - removing statistic callbacks from other phys (KSZ8795, KSZ886X, KSZ8873MLL, KSZ8061, KS8737) as they doesn't have corresponding statistic counters. Fixes: 2b2427d0 ("phy: micrel: Add ethtool statistics counters") Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 1月, 2017 1 次提交
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由 Sean Nyekjaer 提交于
As pr commit "net: phy: phy drivers should not set SUPPORTED_[Asym_]Pause" this phy driver should not set these feature bits. Signed-off-by: NSean Nyekjaer <sean.nyekjaer@prevas.dk> Fixes: 9d162ed6 ("net: phy: micrel: add support for KSZ8795") Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 1月, 2017 1 次提交
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由 Sean Nyekjaer 提交于
This is adds support for the PHYs in the KSZ8795 5port managed switch. It will allow to detect the link between the switch and the soc and uses the same read_status functions as the KSZ8873MLL switch. Signed-off-by: NSean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 12月, 2016 1 次提交
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由 Timur Tabi 提交于
Instead of having individual PHY drivers set the SUPPORTED_Pause and SUPPORTED_Asym_Pause flags, phylib itself should set those flags, unless there is a hardware erratum or other special case. During autonegotiation, the PHYs will determine whether to enable pause frame support. Pause frames are a feature that is supported by the MAC. It is the MAC that generates the frames and that processes them. The PHY can only be configured to allow them to pass through. This commit also effectively reverts the recently applied c7a61319 ("net: phy: dp83848: Support ethernet pause frames"). So the new process is: 1) Unless the PHY driver overrides it, phylib sets the SUPPORTED_Pause and SUPPORTED_AsymPause bits in phydev->supported. This indicates that the PHY supports pause frames. 2) The MAC driver checks phydev->supported before it calls phy_start(). If (SUPPORTED_Pause | SUPPORTED_AsymPause) is set, then the MAC driver sets those bits in phydev->advertising, if it wants to enable pause frame support. 3) When the link state changes, the MAC driver checks phydev->pause and phydev->asym_pause, If the bits are set, then it enables the corresponding features in the MAC. The algorithm is: if (phydev->pause) The MAC should be programmed to receive and honor pause frames it receives, i.e. enable receive flow control. if (phydev->pause != phydev->asym_pause) The MAC should be programmed to transmit pause frames when needed, i.e. enable transmit flow control. Signed-off-by: NTimur Tabi <timur@codeaurora.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 11月, 2016 1 次提交
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由 Kirill Esipov 提交于
Fix setting of SUPPORTED_FIBRE bit as it was not present in features of KSZ8041. Signed-off-by: NKirill Esipov <yesipov@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 10月, 2016 1 次提交
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由 Mike Looijmans 提交于
Set bit 0 in register 1C.23 to enable the EDPD feature of the KSZ9031 PHY. This reduces power consumption when the link is down. Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 8月, 2016 1 次提交
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由 Xander Huff 提交于
Like the ksz8081, the ksz9031 has the behavior where it will clear the interrupt enable bits when leaving power down. This takes advantage of the solution provided by f5aba91d. Signed-off-by: NXander Huff <xander.huff@ni.com> Signed-off-by: NNathan Sullivan <nathan.sullivan@ni.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 8月, 2016 1 次提交
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由 Wenyou Yang 提交于
Disable all interrupts when suspend, they will be enabled when resume. Otherwise, the suspend/resume process will be blocked occasionally. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 8月, 2016 1 次提交
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由 Alexander Stein 提交于
There are KSZ8721 PHYs with phy_id 0x00221619. In order to detect them as PHY_ID_KSZ8001 compatible while staying different to PHY_ID_KSZ9021 ignore the last two bits when matching PHY_ID Signed-off-by: NAlexander Stein <alexanders83@web.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 7月, 2016 1 次提交
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由 Philipp Zabel 提交于
We can't detect the FXEN (fiber mode) bootstrap pin, so configure it via a boolean device tree property "micrel,fiber-mode". If it is enabled, auto-negotiation is not supported. The only available modes are 100base-fx (full duplex and half duplex). Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 5月, 2016 1 次提交
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由 Fabio Estevam 提交于
Replace the hardcoded mask 0x00fffff0 with MICREL_PHY_ID_MASK for better readability. Suggested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 3月, 2016 2 次提交
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由 Alexandre Belloni 提交于
Disable auto negotiation on init to properly detect an already plugged cable at boot. At boot, when the phy is started, it is in the PHY_UP state. However, if a cable is plugged at boot, because auto negociation is already enabled at the time we get the first interrupt, the phy is already running. But the state machine then switches from PHY_UP to PHY_AN and calls phy_start_aneg(). phy_start_aneg() will not do anything because aneg is already enabled on the phy. It will then wait for a interrupt before going further. This interrupt will never happen unless the cable is unplugged and then replugged. It was working properly before 321beec5 (net: phy: Use interrupts when available in NOLINK state) because switching to NOLINK meant starting polling the phy, even if IRQ were enabled. Fixes: 321beec5 (net: phy: Use interrupts when available in NOLINK state) Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Alexandre Belloni 提交于
At least on ksz8081, when getting back from power down, interrupts are disabled. ensure they are reenabled if they were previously enabled. This fixes resuming which is failing on the xplained boards from atmel since 321beec5 (net: phy: Use interrupts when available in NOLINK state) Fixes: 321beec5 (net: phy: Use interrupts when available in NOLINK state) Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 2月, 2016 1 次提交
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由 Andrew Lunn 提交于
commit 2b2427d0 ("phy: micrel: Add ethtool statistics counters") from Dec 30, 2015, leads to the following static checker warning: drivers/net/phy/micrel.c:609 kszphy_get_stat() warn: unsigned 'val' is never less than zero. drivers/net/phy/micrel.c 602 static u64 kszphy_get_stat(struct phy_device *phydev, int i) 603 { 604 struct kszphy_hw_stat stat = kszphy_hw_stats[i]; 605 struct kszphy_priv *priv = phydev->priv; 606 u64 val; 607 608 val = phy_read(phydev, stat.reg); 609 if (val < 0) { ^^^^^^^ Unpossible! 610 val = UINT64_MAX; 611 } else { 612 val = val & ((1 << stat.bits) - 1); 613 priv->stats[i] += val; 614 val = priv->stats[i]; 615 } 616 617 return val; 618 } The same problem exists in the Marvell driver. Fix both. Fixes: 2b2427d0 ("phy: micrel: Add ethtool statistics counters") Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Reported-by: NJulia.Lawall <julia.lawall@lip6.fr> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 1月, 2016 1 次提交
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由 Roosen Henri 提交于
Commit 651df218 ("phy: micrel: Fix finding PHY properties in MAC node.") only fixes finding PHY properties in MAC node for KSZ9021. This commit applies the same fix for KSZ9031. Fixes: 8b63ec18 ("phylib: Make PHYs children of their MDIO bus, not the bus' parent.") Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NHenri Roosen <henri.roosen@ginzinger.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 1月, 2016 3 次提交
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由 Andrew Lunn 提交于
Rather than have each driver set the driver owner field, do it once in the core code. This will also help with later changes, when the device structure will move. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
Not all devices attached to an MDIO bus are phys. So add an mdio_device structure to represent the generic parts of an mdio device, and place this structure into the phy_device. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Andrew Lunn 提交于
In preparation for moving some of the phy_device structure members, add macros for printing errors and debug information. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 31 12月, 2015 1 次提交
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由 Andrew Lunn 提交于
The PHY counters receiver errors and errors while idle. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 12月, 2015 1 次提交
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由 Andrew Lunn 提交于
commit 8b63ec18 ("phylib: Make PHYs children of their MDIO bus, not the bus' parent.") changed the parenting of PHY devices, making them a child of the MDIO bus, instead of the MAC device. This broken the Micrel PHY driver which has a deprecated feature of allowing PHY properties to be placed into the MAC node. In order to find the MAC node, we need to walk up the tree of devices until we find one with an OF node attached. Reported-by: NDinh Nguyen <dinguyen@opensource.altera.com> Suggested-by: NDavid Daney <david.daney@cavium.com> Acked-by: NDavid Daney <david.daney@cavium.com> Fixes: 8b63ec18 ("phylib: Make PHYs children of their MDIO bus, not the bus' parent.") Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NDinh Nguyen <dinguyen@opensource.altera.com> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 10月, 2015 1 次提交
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由 Nathan Sullivan 提交于
Very rarely, the KSZ9031 will appear to complete autonegotiation, but will drop all traffic afterwards. When this happens, the idle error count will read 0xFF after autonegotiation completes. Reset the PHY when in that state. Signed-off-by: NNathan Sullivan <nathan.sullivan@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 6月, 2015 3 次提交
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由 Jaeden Amero 提交于
Link failures have been observed when using the KSZ9031 with HP 1810-8G and HP 1910-8G network switches. Center the FLP timing at 16ms to help avoid intermittent link failures. >From the KSZ9031RNX and KSZ9031MNX data sheets revision 2.2, section "Auto-Negotiation Timing": The KSZ9031[RNX or MNX] Fast Link Pulse (FLP) burst-to-burst transmit timing for Auto-Negotiation defaults to 8ms. IEEE 802.3 Standard specifies this timing to be 16ms +/-8ms. Some PHY link partners need to receive the FLP with 16ms centered timing; otherwise, there can be intermittent link failures and long link-up times. The PHY data sheet recommends configuring the FLP burst registers after power-up/reset and immediately thereafter restarting auto-negotiation, so we center the FLP timing at 16ms and then restart auto-negotiation in the config_init for KSZ9031. Signed-off-by: NJaeden Amero <jaeden.amero@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jaeden Amero 提交于
There are some defines for a few pad skew related extended registers. Specify for which MMD Address (dev_addr) they are for. Signed-off-by: NJaeden Amero <jaeden.amero@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jaeden Amero 提交于
In a few places in this driver, we weren't using const where we could have. Use const more. In addition, change the arrays of strings in ksz9031_config_init() to be not only const, but also static. Signed-off-by: NJaeden Amero <jaeden.amero@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 5月, 2015 1 次提交
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由 Niklas Cassel 提交于
Don't do clock-mode-select if clk == NULL, since when building without CONFIG_HAVE_CLK, clk_get returns NULL and clk_get_rate returns 0. Doing clock-mode-select in this cause causes kszphy_probe to return -EINVAL and thus prevents the device from being probed. The original code (before regression) would return 0 when building without CONFIG_HAVE_CLK. Cc: stable <stable@vger.kernel.org> # 3.18+ Fixes: 1fadee0c ("net/phy: micrel: Add clock support for KSZ8021/KSZ8031") Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com> Reviewed-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NNiklas Cassel <niklass@axis.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 2月, 2015 1 次提交
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由 Sylvain Rochet 提交于
NAND-tree is used to check wiring between MAC and PHY using NAND gates on the PHY side, hence the name. NAND-tree initial status is latched at reset by probing the IRQ pin. However some devices are sharing the PHY IRQ pin with other peripherals such as Atmel SAMA5D[34]x-EK boards when using the optional TM7000 display module, therefore they are switching the PHY in NAND-tree test mode depending on the current IRQ line status at reset. This patch ensure PHY is not in NAND-tree test mode for all Micrel PHYs using IRQ line as a NAND-tree toggle mode at reset. Signed-off-by: NSylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 12月, 2014 1 次提交
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由 Johan Hovold 提交于
Use generic config_init callback also for KSZ8021 and KSZ8031. This has been avoided this far due to commit b838b4ac ("phy/micrel: KSZ8031RNL RMII clock reconfiguration bug"), which claims that the PHY becomes unresponsive if the broadcast-disable flag is set before configuring the clock mode. Turns out that the problem seemingly worked-around by the above mentioned commit was really due to a hardware-configuration issue, where the PHY was in fact strapped to address 3 rather than 0. Tested-by: NBruno Thomsen <bth@kamstrup.dk> Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 11月, 2014 7 次提交
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由 Johan Hovold 提交于
Add myself to the list of copyright holders. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Add generic interrupt-config callback and store interrupt-level bitmask in type data for PHY types not using bit 9. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Micrel KSZ8081 and KSZ8091 PHYs have the RMII Reference Clock Select bit, which is used to select 25 or 50 MHz clock mode. Note that on some revisions of the PHY (e.g. KSZ8081RND) the function of this bit is inverted so that setting it enables 25 rather than 50 MHz mode. Add a new device-tree property "micrel,rmii-reference-clock-select-25-mhz" to describe this. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Add generic RMII-Reference-Clock-Select support. Several Micrel PHY have an RMII-Reference-Clock-Select bit to select 25 MHz or 50 MHz clock mode. Recently, support for configuring this through device tree for KSZ8021 and KSZ8031 was added. Generalise this support so that it can be configured for other PHY types as well. Note that some PHY revisions (of the same type) has this bit inverted. This should be either configurable through a new device-tree property, or preferably, determined based on PHY ID if possible. Also note that this removes support for setting 25 MHz mode from board files which was also added by the above mentioned commit 45f56cb82e45 ("net/phy: micrel: Add clock support for KSZ8021/KSZ8031"). Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Add has_broadcast_disable flag to type-data and generic config_init. This allows us to remove the ksz8081 config_init callback. Note that ksz8021_config_init is kept for now due to a95a18afe4c8 ("phy/micrel: KSZ8031RNL RMII clock reconfiguration bug"). Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Parse the "micrel,led-mode" property at probe, rather than at config_init time in the led-setup helper itself. Note that the bogus parent->of_node bit is removed. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Add structured device-type information and support for generic led-mode setup to the generic config_init callback. This is a first step in ultimately getting rid of device-type specific callbacks. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 11月, 2014 6 次提交
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由 Johan Hovold 提交于
Enable led-mode configuration for KSZ8081 and KSZ8091. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Clean up led-mode setup by introducing proper defines for PHY Control registers 1 and 2 and only passing the register to the setup function. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Refactor led-mode error handling. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Make sure never to update more than two bits when setting the led mode, something which could for example change the reference-clock setting. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that this can also be configured using the B-CAST_OFF pin on KSZ9091, but that KSZ8081 lacks this pin and is also limited to addresses 0 and 3. Specifically, this allows for dual KSZ8081 setups. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Johan Hovold 提交于
Refactor and clean up broadcast disable. Some Micrel PHYs have a broadcast-off bit in the Operation Mode Strap Override register which can be used to disable PHY address 0 as the broadcast address, so that it can be used as a unique (non-broadcast) address on a shared bus. Note that the KSZPHY_OMSO_RMII_OVERRIDE bit is set by default on KSZ8021/8031. Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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