- 07 8月, 2013 1 次提交
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由 Stephen Boyd 提交于
Two header files exist in mach-msm's include/mach directory that are only used by the MSM iommu driver. Move these files to the iommu driver directory and prefix them with "msm_". This allows us to compile the MSM iommu driver on multi-platform kernels. Acked-by: NJoerg Roedel <joro@8bytes.org> Cc: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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- 09 3月, 2011 3 次提交
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由 Stepan Moskovchenko 提交于
Remove the depencency on the IOMMU IDR register, as it may not be accessible depending on the security configuraton. This involves moving the NCB field of IDR into the platform data. Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Stepan Moskovchenko 提交于
Clean up the clock control code in the probe calls, and add support for controlling the clock for the IOMMU bus interconnect. With the (proper) clock driver in place, the clock control logic in the probe function can be made much cleaner since it does not have to deal with the placeholder driver anymore. Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org> Reviewed-by: NTrilok Soni <tsoni@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Stepan Moskovchenko 提交于
Add clock control to the IOMMU driver. The IOMMU bus clock (and potentially an AXI clock) need to be on to gain access to IOMMU registers. Actively control these clocks when needed instead of leaving them on. Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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- 01 12月, 2010 2 次提交
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由 Stepan Moskovchenko 提交于
Add the register field definitions and memory attribute definitions that will be needed to support IOMMU transactions with cache-coherent memory access. Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>
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由 Stepan Moskovchenko 提交于
On msm8x60, the MID field on the AXI connection to the IOMMU can be up to five bits wide. Thus, allow the IOMMU context platform data to map up to 32 MIDs. Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>
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- 09 10月, 2010 1 次提交
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由 Stepan Moskovchenko 提交于
Add support for the IOMMUs found on the upcoming Qualcomm MSM8x60 chips. These IOMMUs allow virtualization of the address space used by most of the multimedia cores on these chips. Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>
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