Nobody is using these mappings so just drop them. of_iomap() in
the timer driver will take care of it for us. Doing this allows
us to remove the 8x60 and 8960 iomap files completely.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

One more step to allowing MSM to participate in the
multi-platform defconfig.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
[davidb: Comment cleanup requested by sboyd]
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

QGIC_DIST and QGIC_CPU bases are now unused as they are
obtained from device tree. Remove the static iomappings.
Signed-off-by: NRohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Remove the unused GCC, ACC, and shared memory definitions in the
8660 static mappings. This allows the 8660 header file to be
included in msm_iomap.h unconditionally.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Several platforms create IOMEM defines for casting to 'void __iomem *',
and other platforms are incorrectly using __io() macro for the same
purpose. This creates a common definition and removes all the platform
specific versions. Rather than try to make linux/io.h and asm/io.h
assembly safe, the assembly version of IOMEM is moved into
asm/assembler.h.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Stephen Warren <swarren@nvidia.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Now that DEBUG_LL is a choice we can move MSM's homegrown choice
menu to DEBUG_LL.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

The two GPIO controllers are always mapped to the same virtual address
across all MSM devices.  Instead of selecting this at compile time,
determine the physical address at runtime, eliminating yet something
else preventing multiple MSM targets from being compiled into the same
kernel.

Change-Id: I1672219d978ab6243526adeda6badf49472baa27
Signed-off-by: NDavid Brown <davidb@codeaurora.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>

- kenrel -> kernel
- whetehr -> whether
- ttt -> tt
- sss -> ss
Signed-off-by: NJustin P. Mattock <justinmattock@gmail.com>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Add the register address definitions for the basic hardware
blocks on the Qualcomm MSM8960 chip.
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

The QGIC registers are mapped to the same virtual addresses across
targets, only the physical address changes.  Move the BASE address out
of target-specific files, and add a SOC name to the base addresses.
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

Allow the timer register to be determined dynamically instead of at
compile time.  Use common virtual addresses for the registers across
all MSM chips, and select the register mappings based on the detected
CPU.
Signed-off-by: NDavid Brown <davidb@codeaurora.org>

MSM8X60 has different IO mappings than previous MSMs.
Signed-off-by: NSteve Muckle <smuckle@codeaurora.org>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>

Add the 'gpiomux' api, which addresses the following shortcomings
of existing tlmm api:

- gpio power-collapse, which is managed by a peripheral processor on
  other targets, must be managed by the application processor on the 8x60.
- The enable/disable flag of the legacy gpio_tlmm_config api
  is not applicable on the 8x60, and causes confusion.
- The gpio 'direction' bits are meaningless for all func_sel
  configurations except for generic-gpio mode (func_sel 0), in which
  case the gpio_direction_* functions should be used.  Having these
  bits in the tlmm api leads to confusion and misuse of the gpiolib
  api, and they have been removed in gpiomux.
- The functional api of the legacy system ran contrary to the typical
  use-case, which is a single massive configuration at boot.  Rather
  than forcing hundreds of 'config' function calls, the new api
  allows data to be configured with a single table.

gpiomux_get and gpiomux_put are meant to be called automatically
when gpio_request and gpio_free are called, giving automatic
gpiomux/tlmm control to those drivers/lines with simple
power profiles - in the simplest cases, an entry in the gpiomux table
and the correct usage of gpiolib is all that is required to get proper
gpio power control.
Signed-off-by: NGregory Bean <gbean@codeaurora.org>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>

Add a header describing the io regions for MSM7x30.
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NGregory Bean <gbean@codeaurora.org>
Signed-off-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>

Add a header describing the io regions for QSD8x50.
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NGregory Bean <gbean@codeaurora.org>
Signed-off-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>

msm_iomap.h is specific to the MSM7x00 series devices.  Generalize
this in preparation to support more devices.
Signed-off-by: NGregory Bean <gbean@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>
Signed-off-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>

Signed-off-by: NDima Zavin <dima@android.com>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>

Provides options to select one of the three "lowspeed" UARTs
on MSM7k SoCs for DEBUG_LL output from the zImage decompressor
and kernel.
Signed-off-by: NBrian Swetland <swetland@google.com>
Signed-off-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>

- Add some more peripherals (sdcc, etc) to the iomap.
- Remove virtual base addresses for devices that we should be passing
  physical addresses to drivers via resources and ioremap()ing.
- don't try to use uarts for ll debug once the mmu is enabled due to
  problems with the peripheral window
- make base addresses void __iomem * and fixup irq.c and timer.c
- Remove common.c and bring in devices.c/devices.h similar to
  the PXA architecture.
Signed-off-by: NBrian Swetland <swetland@google.com>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

- core header files for arch-msm
- Kconfig and Makefiles to enable ARCH_MSM7X00A builds
- MSM7X00A specific arch_idle
- peripheral iomap and irq number definitions
Signed-off-by: NBrian Swetland <swetland@google.com>