1. 07 1月, 2009 2 次提交
    • D
      dmaengine: centralize channel allocation, introduce dma_find_channel · bec08513
      Dan Williams 提交于
      Allowing multiple clients to each define their own channel allocation
      scheme quickly leads to a pathological situation.  For memory-to-memory
      offload all clients can share a central allocator.
      
      This simply moves the existing async_tx allocator to dmaengine with
      minimal fixups:
      * async_tx.c:get_chan_ref_by_cap --> dmaengine.c:nth_chan
      * async_tx.c:async_tx_rebalance --> dmaengine.c:dma_channel_rebalance
      * split out common code from async_tx.c:__async_tx_find_channel -->
        dma_find_channel
      Reviewed-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      
      
      bec08513
    • D
      dmaengine: up-level reference counting to the module level · 6f49a57a
      Dan Williams 提交于
      Simply, if a client wants any dmaengine channel then prevent all dmaengine
      modules from being removed.  Once the clients are done re-enable module
      removal.
      
      Why?, beyond reducing complication:
      1/ Tracking reference counts per-transaction in an efficient manner, as
         is currently done, requires a complicated scheme to avoid cache-line
         bouncing effects.
      2/ Per-transaction ref-counting gives the false impression that a
         dma-driver can be gracefully removed ahead of its user (net, md, or
         dma-slave)
      3/ None of the in-tree dma-drivers talk to hot pluggable hardware, but
         if such an engine were built one day we still would not need to notify
         clients of remove events.  The driver can simply return NULL to a
         ->prep() request, something that is much easier for a client to handle.
      Reviewed-by: NAndrew Morton <akpm@linux-foundation.org>
      Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      
      
      6f49a57a
  2. 06 1月, 2009 1 次提交
  3. 18 7月, 2008 1 次提交
  4. 09 7月, 2008 4 次提交
    • H
      dmaengine: Add slave DMA interface · dc0ee643
      Haavard Skinnemoen 提交于
      This patch adds the necessary interfaces to the DMA Engine framework
      to use functionality found on most embedded DMA controllers: DMA from
      and to I/O registers with hardware handshaking.
      
      In this context, hardware hanshaking means that the peripheral that
      owns the I/O registers in question is able to tell the DMA controller
      when more data is available for reading, or when there is room for
      more data to be written. This usually happens internally on the chip,
      but these signals may also be exported outside the chip for things
      like IDE DMA, etc.
      
      A new struct dma_slave is introduced. This contains information that
      the DMA engine driver needs to set up slave transfers to and from a
      slave device. Most engines supporting DMA slave transfers will want to
      extend this structure with controller-specific parameters.  This
      additional information is usually passed from the platform/board code
      through the client driver.
      
      A "slave" pointer is added to the dma_client struct. This must point
      to a valid dma_slave structure iff the DMA_SLAVE capability is
      requested.  The DMA engine driver may use this information in its
      device_alloc_chan_resources hook to configure the DMA controller for
      slave transfers from and to the given slave device.
      
      A new operation for preparing slave DMA transfers is added to struct
      dma_device. This takes a scatterlist and returns a single descriptor
      representing the whole transfer.
      
      Another new operation for terminating all pending transfers is added as
      well. The latter is needed because there may be errors outside the scope
      of the DMA Engine framework that may require DMA operations to be
      terminated prematurely.
      
      DMA Engine drivers may extend the dma_device, dma_chan and/or
      dma_slave_descriptor structures to allow controller-specific
      operations. The client driver can detect such extensions by looking at
      the DMA Engine's struct device, or it can request a specific DMA
      Engine device by setting the dma_dev field in struct dma_slave.
      
      dmaslave interface changes since v4:
        * Fix checkpatch errors
        * Fix changelog (there are no slave descriptors anymore)
      
      dmaslave interface changes since v3:
        * Use dma_data_direction instead of a new enum
        * Submit slave transfers as scatterlists
        * Remove the DMA slave descriptor struct
      
      dmaslave interface changes since v2:
        * Add a dma_dev field to struct dma_slave. If set, the client can
          only be bound to the DMA controller that corresponds to this
          device.  This allows controller-specific extensions of the
          dma_slave structure; if the device matches, the controller may
          safely assume its extensions are present.
        * Move reg_width into struct dma_slave as there are currently no
          users that need to be able to set the width on a per-transfer
          basis.
      
      dmaslave interface changes since v1:
        * Drop the set_direction and set_width descriptor hooks. Pass the
          direction and width to the prep function instead.
        * Declare a dma_slave struct with fixed information about a slave,
          i.e. register addresses, handshake interfaces and such.
        * Add pointer to a dma_slave struct to dma_client. Can be NULL if
          the DMA_SLAVE capability isn't requested.
        * Drop the set_slave device hook since the alloc_chan_resources hook
          now has enough information to set up the channel for slave
          transfers.
      Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com>
      Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      dc0ee643
    • D
      dmaengine: add DMA_COMPL_SKIP_{SRC,DEST}_UNMAP flags to control dma unmap · e1d181ef
      Dan Williams 提交于
      In some cases client code may need the dma-driver to skip the unmap of source
      and/or destination buffers.  Setting these flags indicates to the driver to
      skip the unmap step.  In this regard async_xor is currently broken in that it
      allows the destination buffer to be unmapped while an operation is still in
      progress, i.e. when the number of sources exceeds the hardware channel's
      maximum (fixed in a subsequent patch).
      Acked-by: NSaeed Bishara <saeed@marvell.com>
      Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com>
      Acked-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      e1d181ef
    • H
      dmaengine: Add dma_client parameter to device_alloc_chan_resources · 848c536a
      Haavard Skinnemoen 提交于
      A DMA controller capable of doing slave transfers may need to know a
      few things about the slave when preparing the channel. We don't want
      to add this information to struct dma_channel since the channel hasn't
      yet been bound to a client at this point.
      
      Instead, pass a reference to the client requesting the channel to the
      driver's device_alloc_chan_resources hook so that it can pick the
      necessary information from the dma_client struct by itself.
      
      [dan.j.williams@intel.com: fixed up fsldma and mv_xor]
      Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com>
      Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      848c536a
    • D
      dmaengine: track the number of clients using a channel · 7cc5bf9a
      Dan Williams 提交于
      Haavard's dma-slave interface would like to test for exclusive access to a
      channel.  The standard channel refcounting is not sufficient in that it
      tracks more than just client references, it is also inaccurate as reference
      counts are percpu until the channel is removed.
      
      This change also enables a future fix to deallocate resources when a client
      declines to use a capable channel.
      Acked-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      7cc5bf9a
  5. 22 4月, 2008 1 次提交
  6. 18 4月, 2008 3 次提交
  7. 31 3月, 2008 1 次提交
  8. 05 3月, 2008 1 次提交
  9. 07 2月, 2008 2 次提交
    • D
      async_tx: replace 'int_en' with operation preparation flags · d4c56f97
      Dan Williams 提交于
      Pass a full set of flags to drivers' per-operation 'prep' routines.
      Currently the only flag passed is DMA_PREP_INTERRUPT.  The expectation is
      that arch-specific async_tx_find_channel() implementations can exploit this
      capability to find the best channel for an operation.
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      Acked-by: NShannon Nelson <shannon.nelson@intel.com>
      Reviewed-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      d4c56f97
    • D
      async_tx: kill tx_set_src and tx_set_dest methods · 0036731c
      Dan Williams 提交于
      The tx_set_src and tx_set_dest methods were originally implemented to allow
      an array of addresses to be passed down from async_xor to the dmaengine
      driver while minimizing stack overhead.  Removing these methods allows
      drivers to have all transaction parameters available at 'prep' time, saves
      two function pointers in struct dma_async_tx_descriptor, and reduces the
      number of indirect branches..
      
      A consequence of moving this data to the 'prep' routine is that
      multi-source routines like async_xor need temporary storage to convert an
      array of linear addresses into an array of dma addresses.  In order to keep
      the same stack footprint of the previous implementation the input array is
      reused as storage for the dma addresses.  This requires that
      sizeof(dma_addr_t) be less than or equal to sizeof(void *).  As a
      consequence CONFIG_DMADEVICES now depends on !CONFIG_HIGHMEM64G.  It also
      requires that drivers be able to make descriptor resources available when
      the 'prep' routine is polled.
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      Acked-by: NShannon Nelson <shannon.nelson@intel.com>
      0036731c
  10. 03 2月, 2008 1 次提交
  11. 25 1月, 2008 1 次提交
  12. 13 7月, 2007 2 次提交
    • D
      dmaengine: make clients responsible for managing channels · d379b01e
      Dan Williams 提交于
      The current implementation assumes that a channel will only be used by one
      client at a time.  In order to enable channel sharing the dmaengine core is
      changed to a model where clients subscribe to channel-available-events.
      Instead of tracking how many channels a client wants and how many it has
      received the core just broadcasts the available channels and lets the
      clients optionally take a reference.  The core learns about the clients'
      needs at dma_event_callback time.
      
      In support of multiple operation types, clients can specify a capability
      mask to only be notified of channels that satisfy a certain set of
      capabilities.
      
      Changelog:
      * removed DMA_TX_ARRAY_INIT, no longer needed
      * dma_client_chan_free -> dma_chan_release: switch to global reference
        counting only at device unregistration time, before it was also happening
        at client unregistration time
      * clients now return dma_state_client to dmaengine (ack, dup, nak)
      * checkpatch.pl fixes
      * fixup merge with git-ioat
      
      Cc: Chris Leech <christopher.leech@intel.com>
      Signed-off-by: NShannon Nelson <shannon.nelson@intel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      Acked-by: NDavid S. Miller <davem@davemloft.net>
      d379b01e
    • D
      dmaengine: refactor dmaengine around dma_async_tx_descriptor · 7405f74b
      Dan Williams 提交于
      The current dmaengine interface defines mutliple routines per operation,
      i.e. dma_async_memcpy_buf_to_buf, dma_async_memcpy_buf_to_page etc.  Adding
      more operation types (xor, crc, etc) to this model would result in an
      unmanageable number of method permutations.
      
      	Are we really going to add a set of hooks for each DMA engine
      	whizbang feature?
      		- Jeff Garzik
      
      The descriptor creation process is refactored using the new common
      dma_async_tx_descriptor structure.  Instead of per driver
      do_<operation>_<dest>_to_<src> methods, drivers integrate
      dma_async_tx_descriptor into their private software descriptor and then
      define a 'prep' routine per operation.  The prep routine allocates a
      descriptor and ensures that the tx_set_src, tx_set_dest, tx_submit routines
      are valid.  Descriptor creation and submission becomes:
      
      struct dma_device *dev;
      struct dma_chan *chan;
      struct dma_async_tx_descriptor *tx;
      
      tx = dev->device_prep_dma_<operation>(chan, len, int_flag)
      tx->tx_set_src(dma_addr_t, tx, index /* for multi-source ops */)
      tx->tx_set_dest(dma_addr_t, tx, index)
      tx->tx_submit(tx)
      
      In addition to the refactoring, dma_async_tx_descriptor also lays the
      groundwork for definining cross-channel-operation dependencies, and a
      callback facility for asynchronous notification of operation completion.
      
      Changelog:
      * drop dma mapping methods, suggested by Chris Leech
      * fix ioat_dma_dependency_added, also caught by Andrew Morton
      * fix dma_sync_wait, change from Andrew Morton
      * uninline large functions, change from Andrew Morton
      * add tx->callback = NULL to dmaengine calls to interoperate with async_tx
        calls
      * hookup ioat_tx_submit
      * convert channel capabilities to a 'cpumask_t like' bitmap
      * removed DMA_TX_ARRAY_INIT, no longer needed
      * checkpatch.pl fixes
      * make set_src, set_dest, and tx_submit descriptor specific methods
      * fixup git-ioat merge
      * move group_list and phys to dma_async_tx_descriptor
      
      Cc: Jeff Garzik <jeff@garzik.org>
      Cc: Chris Leech <christopher.leech@intel.com>
      Signed-off-by: NShannon Nelson <shannon.nelson@intel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      Acked-by: NDavid S. Miller <davem@davemloft.net>
      7405f74b
  13. 04 7月, 2006 1 次提交
  14. 28 6月, 2006 1 次提交
  15. 18 6月, 2006 2 次提交